@techreport{oai:ipsj.ixsq.nii.ac.jp:00240502,
 author = {高木, 遼 and 増渕, 剛 and 森口, 悠斗 and 高井, 伸和 and Ryo, Takagi and Tsuyoshi, Masubuchi and Yuto, Moriguchi and Nobukazu, Takai},
 issue = {20},
 month = {Nov},
 note = {本研究では，アナログ回路のサイジングにおけるベイズ最適化手法の適用について，回路の次元数に応じたアルゴリズム選択が重要であることに着目した．特に高次元のサイジングでは，従来のベイズ最適化（Standard BO）の性能低下が課題であり，高次元用ベイズ最適化手法が注目されているが，低次元回路での有効性は十分に検証されていない．本研究では，低次元と高次元の 2 種類の回路で Standard BO，TuRBO，SAASBO を比較した．結果，低次元では Standard BO，TuRBO が良好な性能を示し，Standard BO に対して TuRBO はシミュレーション回数を 26% 削減したが，SAASBO では 14% 増加した．高次元では，TuRBO が 17%，SAASBO が 60% の削減を達成し，特に SAASBO が高次元で高性能を示した．これにより次元数に応じた手法の選択が重要であることが明らかとなった．, This study focuses on the importance of selecting the appropriate Bayesian optimization algorithm for analog circuit design based on the number of dimensions. In high-dimensional circuit design, the performance of standard Bayesian optimization (Standard BO) decreases, making high-dimensional methods more important. However, their effectiveness in low-dimensional circuits has not been fully tested. In this study, we compared Standard BO, TuRBO, and SAASBO on two types of circuits: low-dimensional and high-dimensional. Results showed that in low-dimensional circuits, Standard BO performed well, and TuRBO reduced simulation counts by 26%, while SAASBO increased them by 14%. In high-dimensional circuits, TuRBO reduced simulations by 17%, and SAASBO by 60%, showing excellent performance for high-dimensional problems. Thus, selecting the right algorithm based on dimensionality is crucial.},
 title = {高次元用ベイズ最適化を用いた アナログ回路のサイジング性能比較},
 year = {2024}
}