{"created":"2025-01-19T01:44:35.358486+00:00","updated":"2025-01-19T07:59:16.155475+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00240414","sets":["934:1022:11484:11723"]},"path":["11723"],"owner":"44499","recid":"240414","title":["Practical Persistent Multi-word Compare-and-Swap Algorithms for Many-core CPUs (Preprint)"],"pubdate":{"attribute_name":"公開日","attribute_value":"2024-10-22"},"_buckets":{"deposit":"287a0c61-5759-4c30-b29b-7b1fce04af0d"},"_deposit":{"id":"240414","pid":{"type":"depid","value":"240414","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"Practical Persistent Multi-word Compare-and-Swap Algorithms for Many-core CPUs (Preprint)","author_link":["659506","659504","659507","659509","659505","659508"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"Practical Persistent Multi-word Compare-and-Swap Algorithms for Many-core CPUs (Preprint)"},{"subitem_title":"Practical Persistent Multi-word Compare-and-Swap Algorithms for Many-core CPUs (Preprint)","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"[研究論文] persistent memory, multi-word compare-and-swap operations, multithreaded software","subitem_subject_scheme":"Other"}]},"item_type_id":"3","publish_date":"2024-10-22","item_3_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Informatics, Nagoya University"},{"subitem_text_value":"Graduate School of Informatics, Nagoya University"},{"subitem_text_value":"Graduate School of Informatics, Nagoya University"}]},"item_3_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Informatics, Nagoya University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Informatics, Nagoya University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Informatics, Nagoya University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/240414/files/IPSJ-TOD1704008.pdf","label":"IPSJ-TOD1704008.pdf"},"date":[{"dateType":"Available","dateValue":"2026-10-22"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-TOD1704008.pdf","filesize":[{"value":"1.2 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"5"},{"tax":["include_tax"],"price":"0","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"13"},{"tax":["include_tax"],"price":"0","billingrole":"39"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"1b4a6550-97ac-4d5b-b2b1-013419d281d6","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2024 by the Information Processing Society of Japan"}]},"item_3_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Kento, Sugiura"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Manabu, Nishimura"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Yoshiharu, Ishikawa"}],"nameIdentifiers":[{}]}]},"item_3_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Kento, Sugiura","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Manabu, Nishimura","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Yoshiharu, Ishikawa","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_3_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11464847","subitem_source_identifier_type":"NCID"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_6501","resourcetype":"journal article"}]},"item_3_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"1882-7799","subitem_source_identifier_type":"ISSN"}]},"item_3_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"In the last decade, academic and industrial researchers have focused on persistent memory because of the development of the first practical product, Intel Optane. One of the main challenges of persistent memory programming is to guarantee consistent durability over separate memory addresses, and Wang et al. proposed a persistent multi-word compare-and-swap (PMwCAS) algorithm to solve this problem. However, their algorithm contains redundant compare-and-swap (CAS) and cache flush instructions and does not achieve sufficient performance on many-core CPUs. This paper proposes a new algorithm to improve performance on many-core CPUs by removing useless CAS/flush instructions from PMwCAS operations. We also exclude dirty flags, which help ensure consistent durability in the original algorithm, from our algorithm using PMwCAS descriptors as write-ahead logs. Experimental results show that the proposed method is up to ten times faster than the original algorithm and suggests several productive uses of PMwCAS operations.\n------------------------------\nThis is a preprint of an article intended for publication Journal of\nInformation Processing(JIP). This preprint should not be cited. This\narticle should be cited as: Journal of Information Processing Vol.32(2024) (online)\n------------------------------","subitem_description_type":"Other"}]},"item_3_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"In the last decade, academic and industrial researchers have focused on persistent memory because of the development of the first practical product, Intel Optane. One of the main challenges of persistent memory programming is to guarantee consistent durability over separate memory addresses, and Wang et al. proposed a persistent multi-word compare-and-swap (PMwCAS) algorithm to solve this problem. However, their algorithm contains redundant compare-and-swap (CAS) and cache flush instructions and does not achieve sufficient performance on many-core CPUs. This paper proposes a new algorithm to improve performance on many-core CPUs by removing useless CAS/flush instructions from PMwCAS operations. We also exclude dirty flags, which help ensure consistent durability in the original algorithm, from our algorithm using PMwCAS descriptors as write-ahead logs. Experimental results show that the proposed method is up to ten times faster than the original algorithm and suggests several productive uses of PMwCAS operations.\n------------------------------\nThis is a preprint of an article intended for publication Journal of\nInformation Processing(JIP). This preprint should not be cited. This\narticle should be cited as: Journal of Information Processing Vol.32(2024) (online)\n------------------------------","subitem_description_type":"Other"}]},"item_3_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographic_titles":[{"bibliographic_title":"情報処理学会論文誌データベース（TOD）"}],"bibliographicIssueDates":{"bibliographicIssueDate":"2024-10-22","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"4","bibliographicVolumeNumber":"17"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"id":240414,"links":{}}