{"created":"2025-01-19T01:41:23.142733+00:00","updated":"2025-01-19T08:37:15.098357+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00238262","sets":["6164:6165:7651:11699"]},"path":["11699"],"owner":"44499","recid":"238262","title":["FPGA向けAI実装に対する回避攻撃の安全性評価"],"pubdate":{"attribute_name":"公開日","attribute_value":"2024-08-21"},"_buckets":{"deposit":"e7604277-2cb6-41fc-98ea-7a4f623b55e7"},"_deposit":{"id":"238262","pid":{"type":"depid","value":"238262","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"FPGA向けAI実装に対する回避攻撃の安全性評価","author_link":["652436","652437","652434","652435"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"FPGA向けAI実装に対する回避攻撃の安全性評価"},{"subitem_title":"Security Evaluation of Evasion Attacks for FPGA oriented AI Implementation","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"セキュリティ","subitem_subject_scheme":"Other"}]},"item_type_id":"18","publish_date":"2024-08-21","item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_18_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"名城大学"},{"subitem_text_value":"名城大学"}]},"item_18_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Meijo University","subitem_text_language":"en"},{"subitem_text_value":"Meijo University","subitem_text_language":"en"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/238262/files/IPSJ-DAS2024038.pdf","label":"IPSJ-DAS2024038.pdf"},"date":[{"dateType":"Available","dateValue":"2026-08-21"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-DAS2024038.pdf","filesize":[{"value":"1.3 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"88f86528-42d1-4253-9d03-f9c71986f4df","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2024 by the Information Processing Society of Japan"}]},"item_18_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"野崎, 佑典"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"吉川, 雅弥"}],"nameIdentifiers":[{}]}]},"item_18_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Yusuke, Nozaki","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Masaya, Yoshikawa","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_5794","resourcetype":"conference paper"}]},"item_18_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"Society5.0 においてエッジ AI 技術の活用が期待されている．一方で，AI 技術の利活用では AI を対象にした様々な攻撃の脅威が報告されており，これらの解析に対する安全性評価が重要である．特に，敵対的サンプルなどの回避攻撃は，AI に対して誤った推論を誘導させるため，その対策や安全性評価を行うことが必要である．一方で，これまでに Field Programmable Gate Array（FPGA）を指向した AI 実装である LUT-Network に対しては，回避攻撃などのセキュリティ脅威に関する検討が十分に行われていない．そこで本研究では，FPGA 向け AI 実装に対する回避攻撃について検討し，その安全性について評価する．","subitem_description_type":"Other"}]},"item_18_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"Edge AI technology is expected to be used in Society 5.0. On the other hand, since various threats of attacks on AI have been reported in the application of AI technologies, it is important to evaluate the security of AI against these analyses. Evasive attacks, such as adversarial examples, mislead AI inferences. Therefore, countermeasures and security evaluation are required. However, security threats such as evasion attacks have not been sufficiently studied for LUT-Network, which is a field programmable gate array (FPGA)-oriented AI implementation. Therefore, this study proposes evasion attacks against FPGA-oriented AI implementations and evaluates their security.","subitem_description_type":"Other"}]},"item_18_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"247","bibliographic_titles":[{"bibliographic_title":"DAシンポジウム2024論文集"}],"bibliographicPageStart":"243","bibliographicIssueDates":{"bibliographicIssueDate":"2024-08-21","bibliographicIssueDateType":"Issued"},"bibliographicVolumeNumber":"2024"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"id":238262,"links":{}}