{"created":"2025-01-19T01:37:14.152523+00:00","updated":"2025-01-19T09:34:42.542779+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00235644","sets":["6504:11678:11698"]},"path":["11698"],"owner":"44499","recid":"235644","title":["マルチGPU上での畳み込みニューラルネットワークにおけるハイブリッド並列処理"],"pubdate":{"attribute_name":"公開日","attribute_value":"2024-03-01"},"_buckets":{"deposit":"7c3cbfbf-cd9c-42d1-a00e-52e0834b2fcc"},"_deposit":{"id":"235644","pid":{"type":"depid","value":"235644","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"マルチGPU上での畳み込みニューラルネットワークにおけるハイブリッド並列処理","author_link":["643960","643961"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"マルチGPU上での畳み込みニューラルネットワークにおけるハイブリッド並列処理"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"コンピュータシステム","subitem_subject_scheme":"Other"}]},"item_type_id":"22","publish_date":"2024-03-01","item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_22_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"明大"},{"subitem_text_value":"明大"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/235644/files/IPSJ-Z86-5J-05.pdf","label":"IPSJ-Z86-5J-05.pdf"},"date":[{"dateType":"Available","dateValue":"2024-07-03"}],"format":"application/pdf","filename":"IPSJ-Z86-5J-05.pdf","filesize":[{"value":"117.0 kB"}],"mimetype":"application/pdf","accessrole":"open_date","version_id":"e1ecad58-e18d-4b8e-823a-98d3f7d82e20","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2024 by the Information Processing Society of Japan"}]},"item_22_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"綿貫, 幸"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"吉田, 明正"}],"nameIdentifiers":[{}]}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_5794","resourcetype":"conference paper"}]},"item_22_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN00349328","subitem_source_identifier_type":"NCID"}]},"item_22_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"深層学習は広い分野で活用されているが，性能向上を目的とした訓練データやパラメータの増加により，学習時間の増加が課題となる．そこで，マルチGPUを用いた並列処理による高速化が期待されている．本研究では，マルチGPU環境において各GPUに複数ステージを割り当てるモデル並列と，モデルを複製し複数のバッチを同時に処理するデータ並列を併用したハイブリッド並列処理手法を提案し，深層学習の高速化を図る．性能評価においては，C++による画像分類CNNプログラムを作成し，CUDAとOpenMPを用いて並列処理を実装した．NVIDIA Tesla K80搭載Xeonサーバ上で評価を行った結果，提案手法の有効性が確認された．","subitem_description_type":"Other"}]},"item_22_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"68","bibliographic_titles":[{"bibliographic_title":"第86回全国大会講演論文集"}],"bibliographicPageStart":"67","bibliographicIssueDates":{"bibliographicIssueDate":"2024-03-01","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"1","bibliographicVolumeNumber":"2024"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"id":235644,"links":{}}