{"id":235624,"links":{},"created":"2025-01-19T01:37:12.239151+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00235624","sets":["6504:11678:11698"]},"path":["11698"],"owner":"44499","recid":"235624","title":["電位・電界シミュレーションのNVIDIA Ampereアーキテクチャへの最適化"],"pubdate":{"attribute_name":"公開日","attribute_value":"2024-03-01"},"_buckets":{"deposit":"db22fb82-2cd0-47b1-af8d-bdac867c0dcd"},"_deposit":{"id":"235624","pid":{"type":"depid","value":"235624","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"電位・電界シミュレーションのNVIDIA Ampereアーキテクチャへの最適化","author_link":["643894","643893"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"電位・電界シミュレーションのNVIDIA Ampereアーキテクチャへの最適化"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"コンピュータシステム","subitem_subject_scheme":"Other"}]},"item_type_id":"22","publish_date":"2024-03-01","item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_22_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"岡山理大"},{"subitem_text_value":"岡山理大"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/235624/files/IPSJ-Z86-1J-04.pdf","label":"IPSJ-Z86-1J-04.pdf"},"date":[{"dateType":"Available","dateValue":"2024-07-03"}],"format":"application/pdf","filename":"IPSJ-Z86-1J-04.pdf","filesize":[{"value":"347.5 kB"}],"mimetype":"application/pdf","accessrole":"open_date","version_id":"36db22b0-2b67-41e7-aade-555c5792bdf7","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2024 by the Information Processing Society of Japan"}]},"item_22_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"小西, 秀策"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"上嶋, 明"}],"nameIdentifiers":[{}]}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_5794","resourcetype":"conference paper"}]},"item_22_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN00349328","subitem_source_identifier_type":"NCID"}]},"item_22_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"Poisson方程式を用いた電位・電界シミュレーションは，落雷の予測や半導体製品の解析などの分野で応用されている。この手法には低コストで詳細な解析データを得られるという利点がある一方で，膨大な計算量と計算時間を要するという課題が存在する。そこで本研究では，Ampereアーキテクチャ採用GPU(Graphics Processing Unit)であるNVIDIA A100を用いて電位・電界シミュレーションの高速化を図る。そして，プロファイリングに基づきGPUのアーキテクチャに合わせた最適化を行い，先行研究のプログラムと比較してどの程度性能が向上したかについて評価する。","subitem_description_type":"Other"}]},"item_22_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"26","bibliographic_titles":[{"bibliographic_title":"第86回全国大会講演論文集"}],"bibliographicPageStart":"25","bibliographicIssueDates":{"bibliographicIssueDate":"2024-03-01","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"1","bibliographicVolumeNumber":"2024"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"updated":"2025-01-19T09:35:10.306878+00:00"}