{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00023562","sets":["1164:1579:1622:1623"]},"path":["1623"],"owner":"1","recid":"23562","title":["マルチプロセッサにおける共有変数用キャッシュ"],"pubdate":{"attribute_name":"公開日","attribute_value":"2001-11-28"},"_buckets":{"deposit":"33682147-8b9d-4868-be42-eac03b47f1e9"},"_deposit":{"id":"23562","pid":{"type":"depid","value":"23562","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"マルチプロセッサにおける共有変数用キャッシュ","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"マルチプロセッサにおける共有変数用キャッシュ"},{"subitem_title":"A Cache Architecture for Shared Variables on Multiprocessor","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2001-11-28","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"九州工業大学工学部電気工学科"},{"subitem_text_value":"九州工業大学工学部電気工学科"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Depertment of Electronic Engineering, Faculty of Engineering, Kyushu Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Depertment of Electronic Engineering, Faculty of Engineering, Kyushu Institute of Technology","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/23562/files/IPSJ-ARC01145005.pdf"},"date":[{"dateType":"Available","dateValue":"2003-11-28"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC01145005.pdf","filesize":[{"value":"1.2 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"6826410c-9166-434e-b5e7-e8f4efe042ce","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2001 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"山脇, 彰"},{"creatorName":"岩根, 雅彦"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Akira, Yamawaki","creatorNameLang":"en"},{"creatorName":"Masahiko, Iwane","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"同期機能を持つ共有変数メモリTSVMのキャッシュであるTSVCを搭載したマルチプロセッサオンチップ（MOC）を提案する。MOCにおいて，TSVMはTSVCと主メモリで実現され，スレッド間の同期通信はTSVCの一貫性制御とともに行われる。タスクの生成と同時に共有変数をTSVCに読込んでおくため，タスクの実行中にPEは共有変数を高速にアクセスできる。MOCの開発にあたり，TSVMのプログラムとの親和性とTSVCの基本機能の性能を検証した。TSVMを用いて並列化したプログラムと同期通信メモリTCSMでのコード量を比較し，TSVCはTCSMに対し最大で26％のコード量を削減でき，最大で1.88の速度向上を得た。","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"The tagged Shared Variable Memory(TSVM) is the concept of a structured memory with the synchronization mechanism, and consists of the Tagged Shared Varibale Cache(TSVC) and a main memory in Multiprocessor-On-a-Chip(MOC). The synchronization and communication between threads are performed simultaneously with consistency control of TSVC. Because a shared variables are loaded to TSVCs in generating a task, a PE in the MOC can access them via TSVC during executing the task. In development of MOC, the adaptivity to a parallel program of TSVM and the validity of the fundamental function of TSVC is compared with TCSM using two programs on multiprocessor MTA/TSVM consists of 4 scalar processors. TSVM can reduce the amount of assembler code of up to 26% for TCSM. The maximum speed up ratio of TSVC to TCSM is 1.88.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"38","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告計算機アーキテクチャ（ARC）"}],"bibliographicPageStart":"33","bibliographicIssueDates":{"bibliographicIssueDate":"2001-11-28","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"116(2001-ARC-145)","bibliographicVolumeNumber":"2001"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"id":23562,"updated":"2025-01-22T20:19:28.700512+00:00","links":{},"created":"2025-01-18T22:54:56.201836+00:00"}