{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00023520","sets":["1164:1579:1616:1620"]},"path":["1620"],"owner":"1","recid":"23520","title":["SCIMAにおけるメモリアクセス機構の設計と評価"],"pubdate":{"attribute_name":"公開日","attribute_value":"2002-03-07"},"_buckets":{"deposit":"0f0359d5-b9f4-4524-8bd7-085d1da156cf"},"_deposit":{"id":"23520","pid":{"type":"depid","value":"23520","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"SCIMAにおけるメモリアクセス機構の設計と評価","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"SCIMAにおけるメモリアクセス機構の設計と評価"},{"subitem_title":"A Design and Evaluation of Memory Access Structure for SCIMA","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2002-03-07","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"東京大学先端科学技術研究センター"},{"subitem_text_value":"東京大学先端科学技術研究センター"},{"subitem_text_value":"東京大学先端科学技術研究センター"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Research Center for Advanced Science and Technology, The University of Tokyo","subitem_text_language":"en"},{"subitem_text_value":"Research Center for Advanced Science and Technology, The University of Tokyo","subitem_text_language":"en"},{"subitem_text_value":"Research Center for Advanced Science and Technology, The University of Tokyo","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/23520/files/IPSJ-ARC01147014.pdf"},"date":[{"dateType":"Available","dateValue":"2004-03-07"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC01147014.pdf","filesize":[{"value":"259.3 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"bdb6f0bf-b57d-496b-abf9-dd2942855647","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2002 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"大根田, 拓"},{"creatorName":"近藤, 正章"},{"creatorName":"中村, 宏"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Taku, Ohneda","creatorNameLang":"en"},{"creatorName":"Masaaki, Kondo","creatorNameLang":"en"},{"creatorName":"Hiroshi, Nakamura","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"プロセッサとメモリの性能格差の問題への対処を目的として  主にハイパフォーマンスコンピューティング分野をターゲットとしたプロセッサアーキテクチャSCIMAを提案している. SCIMAではチップ上のメモリとして従来のキャッシュに加えオンチップメモリを搭載し  オンチップメモリへのデータ転送命令として新たにpage-load/page-store命令を備える. 本稿では，SCIMAのメモリアクセス機構の評価を行なった．従来のプロセッサにおけるメモリアクセス機構とSCIMAへの拡張を施した機構をともに設計し SCIMAへの拡張が面積・遅延へ与える影響を調べた．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"The performance gap between processor and main memory is serious problem especially in high performance computing. In order to overcome this problem, we have proposed a new processor  architecture called SCIMA, which integrates software-controllable addressable memory into processor chip as a part of main memory in addition to ordinary cache. We designed a memory access unit of SCIMA which is a extension of ordinary  microprocessors. In this paper, we present its mechanism and evaluate its impact on area and clock frequency.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"84","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告計算機アーキテクチャ（ARC）"}],"bibliographicPageStart":"79","bibliographicIssueDates":{"bibliographicIssueDate":"2002-03-07","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"22(2001-ARC-147)","bibliographicVolumeNumber":"2002"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"id":23520,"updated":"2025-01-22T20:20:42.514590+00:00","links":{},"created":"2025-01-18T22:54:54.339707+00:00"}