{"links":{},"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00234562","sets":["1164:1579:11464:11617"]},"path":["11617"],"owner":"44499","recid":"234562","title":["キャッシュの導入およびその一貫性制御の活用による高性能な分散トランザクショナルメモリ"],"pubdate":{"attribute_name":"公開日","attribute_value":"2024-06-03"},"_buckets":{"deposit":"4459158b-b25d-482d-85c8-f8fa73971f82"},"_deposit":{"id":"234562","pid":{"type":"depid","value":"234562","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"キャッシュの導入およびその一貫性制御の活用による高性能な分散トランザクショナルメモリ","author_link":["639321","639317","639319","639323","639322","639320","639318"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"キャッシュの導入およびその一貫性制御の活用による高性能な分散トランザクショナルメモリ"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"メモリ・キャッシュ","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2024-06-03","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"名古屋工業大学"},{"subitem_text_value":"名古屋工業大学"},{"subitem_text_value":"名古屋工業大学"},{"subitem_text_value":"名古屋工業大学"},{"subitem_text_value":"東京大学"},{"subitem_text_value":"国立情報学研究所"},{"subitem_text_value":"名古屋工業大学"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Nagoya Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Nagoya Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Nagoya Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Nagoya Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"The University of Tokyo","subitem_text_language":"en"},{"subitem_text_value":"National Institute of Informatics","subitem_text_language":"en"},{"subitem_text_value":"Nagoya Institute of Technology","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/234562/files/IPSJ-ARC24257018.pdf","label":"IPSJ-ARC24257018.pdf"},"date":[{"dateType":"Available","dateValue":"2026-06-03"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC24257018.pdf","filesize":[{"value":"5.9 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"b06d3ed4-1d90-4e29-96fe-3ed437142f11","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2024 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"酒井, 駿輔"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"二本松, 秀樹"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"伊原, 槻"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"小泉, 透"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"塩谷, 亮太"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"五島, 正裕"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"津邑, 公暁"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8574","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"HPC（高性能計算）分野で用いられている大規模計算環境では，最大性能のために生産性が犠牲となっている．この問題は，今後メニーコア・メニーノード化が進むにつれ，より深刻になっていく．共有メモリ環境における並行性制御機構のひとつであるトランザクショナルメモリ（TM）は，生産性の高いパラダイムとして有望視されているものの，複数コア・複数ノード向けの実用的な実装は存在しない．複数ノードからなる分散環境における TM 実装として，分散トランザクショナルメモリ（Distributed Transactional Memory: DTM）の既存研究はいくつか存在しているが，コヒーレンス制御のスケーラビリティを向上させることが難しいことなどから未だ実用性に乏しい．そこで，本研究では，ソフトウェアキャッシュ及び同期不要なクロックをシステムに導入することで，従来の DTM が持つ性能および安全性の問題を解決し，スケーラビリティを損ねることなくトランザクションの一貫性を保証する手法を提案する．","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"11","bibliographic_titles":[{"bibliographic_title":"研究報告システム・アーキテクチャ（ARC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2024-06-03","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"18","bibliographicVolumeNumber":"2024-ARC-257"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"created":"2025-01-19T01:36:21.413518+00:00","updated":"2025-01-19T09:46:09.414038+00:00","id":234562}