{"links":{},"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00234558","sets":["1164:1579:11464:11617"]},"path":["11617"],"owner":"44499","recid":"234558","title":["AIアクセラレータにおける故障位置検出可能なLBIST方法"],"pubdate":{"attribute_name":"公開日","attribute_value":"2024-06-03"},"_buckets":{"deposit":"0cc36bac-ef2d-4f32-8849-3d26684aab7d"},"_deposit":{"id":"234558","pid":{"type":"depid","value":"234558","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"AIアクセラレータにおける故障位置検出可能なLBIST方法","author_link":["639305","639306","639308","639307"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"AIアクセラレータにおける故障位置検出可能なLBIST方法"},{"subitem_title":"A LBIST Method for Detecting Fault Locations in AI Accelerators","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"信頼性・品質管理","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2024-06-03","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"千葉大学大学院融合理工学府"},{"subitem_text_value":"千葉大学大学院工学研究院"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Science and Engineering, Chiba University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Engineering, Chiba University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/234558/files/IPSJ-ARC24257014.pdf","label":"IPSJ-ARC24257014.pdf"},"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC24257014.pdf","filesize":[{"value":"1.7 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_login","version_id":"b4a2f3bf-2f3f-4117-88a3-6967c620e391","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2024 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"チョウ, カシ"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"難波, 一輝"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Jiaxi, Zhang","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Kazuteru, Namba","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8574","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"近年，人工知能（AI）技術は医療，交通,物流など幅広い分野で活用され，社会と生活に不可欠な存在となっている．AI 技術の発展に伴い，AI チップの技術も重要性を増している．これらのチップは，従来の CPU チップでは対応できない複雑な計算を効率的に行うために，特殊なハードウェアアーキテクチャが必要になる．したがって，AI チップの検出の重要性も日々高まっている．本研究では，Systolic Array アーキテクチャの AI アクセラレータの信頼性検出のための，故障した PE（Process Element）の具体的な位置を特定する LBIST スキームを提案する.先行研究で使用された One Hot Encoding 技術の TPG などを組み合わせることにより，stuck-at-0 故障の検出率はほぼ 100％ に達することができる．また，本研究は異なるサイズの Systolic Array に最適な分割アルゴリズムを検討し，具体的な PE の検出機能を実現した．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"In recent years, artificial intelligence (AI) technology has been widely utilized in various fields such as healthcare, transportation, and logistics, becoming an indispensable part of society and daily life. With the advancement of AI technology, the importance of AI chips has also increased. These chips require special hardware architectures to efficiently perform complex computations that traditional CPU chips cannot handle. Therefore, the detection of AI chips has become increasingly important. In this study, we propose an LBIST (Logic Built-In Self-Test) scheme to identify the specific locations of faulty Process Elements (PEs) for the reliability detection of AI accelerators based on the Systolic Array architecture by combining techniques such as TPG (Test Pattern Generation) using one-hot encoding, the detection rate for stuck-at-0 faults can reach nearly 100%. Moreover, this research examines optimal partitioning algorithms for Systolic Arrays of different sizes to achieve precise PE detection capability.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システム・アーキテクチャ（ARC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2024-06-03","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"14","bibliographicVolumeNumber":"2024-ARC-257"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"created":"2025-01-19T01:36:21.035798+00:00","updated":"2025-01-19T09:46:14.502633+00:00","id":234558}