{"updated":"2025-01-19T10:04:40.039008+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00233495","sets":["1164:2822:11469:11529"]},"path":["11529"],"owner":"44499","recid":"233495","title":["RISC-Vプロセッサのためのベクトル拡張と同時マルチスレッディングの融合"],"pubdate":{"attribute_name":"公開日","attribute_value":"2024-03-14"},"_buckets":{"deposit":"2926723b-06ed-45f7-9f7b-252684906b25"},"_deposit":{"id":"233495","pid":{"type":"depid","value":"233495","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"RISC-Vプロセッサのためのベクトル拡張と同時マルチスレッディングの融合","author_link":["634342","634344","634345","634341","634343","634340"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"RISC-Vプロセッサのためのベクトル拡張と同時マルチスレッディングの融合"},{"subitem_title":"Integration of Vector Extension and Simultaneous Multithreading for a RISC-V Processor","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"プロセッサ・アーキテクチャ","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2024-03-14","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"東京農工大学大学院工学府情報工学専攻"},{"subitem_text_value":"東京農工大学大学院工学府知能情報システム工学専攻"},{"subitem_text_value":"東京農工大学大学院工学研究院先端情報科学部門"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Department of Computer and Information Sciences, Graduate School of Engineering, Tokyo University of Agriculture and Technology","subitem_text_language":"en"},{"subitem_text_value":"Department of Electrical Engineering and Computer Science, Graduate School of Engineering, Tokyo University of Agriculture and Technology","subitem_text_language":"en"},{"subitem_text_value":"Division of Advanced Information Technology and Computer Science, Institute of Engineering, Tokyo University of Agriculture and Technology","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/233495/files/IPSJ-EMB24065018.pdf","label":"IPSJ-EMB24065018.pdf"},"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-EMB24065018.pdf","filesize":[{"value":"1.2 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"42"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_login","version_id":"ec19ea13-4357-42a0-802a-217ac5667fe9","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2024 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"田中, 秀太朗"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"高田, 勝悟"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"中條, 拓伯"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Hidetaro, Tanaka","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Shogo, Takata","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Hironori, Nakajo","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA12149313","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-868X","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"ベクトルアーキテクチャでは命令列のチェイニングにより並列実行が可能だが，単一の命令流ではベクトル機能ユニットの使用率が低下する場合がある．ここに同時マルチスレッディング（SMT）を導入することにより，ベクトル機能ユニットの使用率を向上させ，近年需要が高まる AI アプリケーション等のデータレベル並列性の高いプログラムの高速化が見込まれる．本稿では，本研究室で 2022 年度に実装された RISC-V SMT プロセッサである B4SMT にベクトルアーキテクチャを追加することにより，ベクトル拡張と SMT を融合する B4SMT-V の実装および評価を行った．行列乗算プログラムによってクロックサイクル数で比較した結果として，シングルスレッド動作と比較し SMT では約 53.8% にクロックサイクル数を削減することができた．また，ベクトルレジスタファイルの合計サイズが共通のもので比較した場合，SMT を用いることにより約 73.7% に削減することができた．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"In vector architectures, the potential for parallel execution lies in the chaining of instruction sequences. However, a singular instruction flow may lead to underutilization of vector functional units. The integration of Simultaneous Multithreading (SMT) presents an opportunity to enhance the efficiency of vector functional units, thereby expediting programs with high data-level parallelism, notably evident in AI applications, which have experienced higher demand recently. This study introduces B4SMT-V, a RISC-V Processor that integrates vector extension with SMT. Specifically, it extends the vector architecture onto B4SMT, a RISC-V SMT processor previously developed in 2022 in our laboratory. On matrix multiplication programs, SMT demonstrates a reduction in clock cycles approximately 53.8%, when compared with single thread execution. In addition, when compared with the same total size of vector register files, the use of SMT reduced the clock cycles to approximately 73.7%.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告組込みシステム（EMB）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2024-03-14","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"18","bibliographicVolumeNumber":"2024-EMB-65"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"created":"2025-01-19T01:34:58.441658+00:00","id":233495,"links":{}}