{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00233461","sets":["1164:2036:11466:11528"]},"path":["11528"],"owner":"44499","recid":"233461","title":["アクセラレータ・アーキテクチャ探索におけるPPA評価の課題と対策"],"pubdate":{"attribute_name":"公開日","attribute_value":"2024-03-14"},"_buckets":{"deposit":"ef0b0176-e830-4dd4-b83f-6af7a3b5052a"},"_deposit":{"id":"233461","pid":{"type":"depid","value":"233461","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"アクセラレータ・アーキテクチャ探索におけるPPA評価の課題と対策","author_link":["634190","634196","634188","634194","634197","634189","634198","634187","634191","634192","634193","634195"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"アクセラレータ・アーキテクチャ探索におけるPPA評価の課題と対策"},{"subitem_title":"PPA performance estimation for accelerator architecture exploration","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"回路・システム設計","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2024-03-14","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"富士通株式会社"},{"subitem_text_value":"富士通株式会社"},{"subitem_text_value":"富士通株式会社"},{"subitem_text_value":"富士通株式会社"},{"subitem_text_value":"富士通株式会社"},{"subitem_text_value":"富士通株式会社"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Fujitsu Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Fujitsu Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Fujitsu Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Fujitsu Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Fujitsu Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Fujitsu Ltd.","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/233461/files/IPSJ-SLDM24205030.pdf","label":"IPSJ-SLDM24205030.pdf"},"date":[{"dateType":"Available","dateValue":"2026-03-14"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM24205030.pdf","filesize":[{"value":"556.5 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"3cad6e1b-05e1-4be4-a98e-6dc2ca6fda82","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2024 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"中村, 洋介"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"萩原, 汐"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"伊藤, 真紀子"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"児玉, 宏喜"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"濱湊, 真"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"吉川, 隆英"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Yosuke, Nakamura","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Shiho, Hagiwara","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Makiko, Ito","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Hiroyoshi, Kodama","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Makoto, Hamaminato","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Takahide, Yoshikawa","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8639","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"最先端半導体プロセスで省電力省面積かつ高性能なアクセラレータのアーキテクチャを構築するためには，アプリケーションの性能が出るようにメモリや演算器，データ転送配線などの様々なリソースの最適化を行うだけでなく，冷却能力限界を超えない発熱，電力の制約や，製造歩留まり・コストに直結する面積の制約も同時に考慮する必要がある．さらに使用する演算器マクロセル種の選択も評価結果に大きな影響を与える．本論文では，我々が現在検討を行っているアクセラレータの研究において性能，電力，面積評価を踏まえたアーキテクチャ探索を行うために実施した，(1) オープンソースの半導体プロセスライブラリのトランジスタ実装密度並びに配線密度の妥当性確認，(2) 演算器マクロセルの選択指針を作成するための電力，面積評価の具体例を示す．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"To explore a power-saving, area-saving, and high-performance accelerator architecture using state-of-the-art semiconductor processes, it is critically necessary not only to optimize various resources such as memory, arithmetic units, and data transfer buses to achieve high application performance but also to concurrently consider the heat generation and power constraints which must not exceed the cooling capacity limit, as well as the area constraints that directly connect to the yield and cost. Moreover, selecting the macro-cell type to be used also significantly impacts the performance, power, and area. In this paper, we present our practice of (1) transistor density and wiring density evaluation to validate an open-source semiconductor process library and (2) setting a guideline for selecting the macro cell type of arithmetic unit throughout our research on accelerator architecture.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"7","bibliographic_titles":[{"bibliographic_title":"研究報告システムとLSIの設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2024-03-14","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"30","bibliographicVolumeNumber":"2024-SLDM-205"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"id":233461,"updated":"2025-01-19T10:05:22.346058+00:00","links":{},"created":"2025-01-19T01:34:55.118296+00:00"}