{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00023272","sets":["1164:1579:1604:1605"]},"path":["1605"],"owner":"1","recid":"23272","title":["セキュアプロセッサの開発"],"pubdate":{"attribute_name":"公開日","attribute_value":"2004-12-02"},"_buckets":{"deposit":"9c2193ff-7695-403d-a540-1ced8af11dc4"},"_deposit":{"id":"23272","pid":{"type":"depid","value":"23272","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"セキュアプロセッサの開発","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"セキュアプロセッサの開発"},{"subitem_title":"Development of A Secure Processor","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2004-12-02","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"岩手県立大学大学院ソフトウェア情報学研究科"},{"subitem_text_value":"岩手県立大学ソフトウェア情報学部"},{"subitem_text_value":"岩手県立大学ソフトウェア情報学部"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Iwate Prefrctural University Graduate School of Software and Information Science","subitem_text_language":"en"},{"subitem_text_value":"Iwate Prefrctural University Faculty of Software and Information Science","subitem_text_language":"en"},{"subitem_text_value":"Iwate Prefrctural University Faculty of Software and Information Science","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/23272/files/IPSJ-ARC04160013.pdf"},"date":[{"dateType":"Available","dateValue":"2006-12-02"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC04160013.pdf","filesize":[{"value":"690.4 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"62cf7135-ddd5-4f43-974c-560708b73aaf","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2004 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"穂積, 健介"},{"creatorName":"猪股, 俊光"},{"creatorName":"曽我, 正和"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Kensuke, Hozumi","creatorNameLang":"en"},{"creatorName":"Toshimitsu, Inomata","creatorNameLang":"en"},{"creatorName":"Masakazu, Soga","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"ディジタル署名機能をもつ非接触ICカード用のマイクロプロセッサSEP--5を設計した．SEP--5は，高速暗号計算機能，秘密鍵漏洩防止機能，汎用計算機能，低電力消費を要件として設計されたもので，コプロセッサを用いずに，単独のプロセッサで実現することが特徴である．このプロセッサをFPGAに実装し，これまでに開発をすすめてきたプロセッサSEP--4との比較を行った．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"We have designed a microprocessor ``SEP--5'', which has the function of digital signature calculation for noncontact IC--cards. It is required that a high-speed code calculation function, a private key disclosure prevention function, a general-purpose calculation function, and low power consumption. The feature of SEP--5 is realized by the independent processor not using a co-processor. We have mounted this processor on FPGA, and compared with SEP--4 which is a predecessor of SEP--5.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"76","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告計算機アーキテクチャ（ARC）"}],"bibliographicPageStart":"71","bibliographicIssueDates":{"bibliographicIssueDate":"2004-12-02","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"123(2004-ARC-160)","bibliographicVolumeNumber":"2004"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"id":23272,"updated":"2025-01-22T20:29:22.517272+00:00","links":{},"created":"2025-01-18T22:54:43.376350+00:00"}