{"id":23209,"updated":"2025-01-22T20:31:13.494034+00:00","links":{},"created":"2025-01-18T22:54:40.591375+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00023209","sets":["1164:1579:1598:1601"]},"path":["1601"],"owner":"1","recid":"23209","title":["DIMMnet-2ネットワークインタフェースにおけるプリフェッチ機構の実装と評価"],"pubdate":{"attribute_name":"公開日","attribute_value":"2005-05-31"},"_buckets":{"deposit":"3c7b72c6-8267-40ef-b8bc-22d10e3515ef"},"_deposit":{"id":"23209","pid":{"type":"depid","value":"23209","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"DIMMnet-2ネットワークインタフェースにおけるプリフェッチ機構の実装と評価","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"DIMMnet-2ネットワークインタフェースにおけるプリフェッチ機構の実装と評価"},{"subitem_title":"Implementation and Evaluation of the Mechanisims for Low Latency Communication on DIMMnet-2","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2005-05-31","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"慶應義塾大学"},{"subitem_text_value":"慶應義塾大学"},{"subitem_text_value":"慶應義塾大学"},{"subitem_text_value":"慶應義塾大学"},{"subitem_text_value":"横浜国立大学"},{"subitem_text_value":"(株) 東芝  研究開発センター"},{"subitem_text_value":"東京農工大学"},{"subitem_text_value":"慶應義塾大学"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Keio University","subitem_text_language":"en"},{"subitem_text_value":"Keio University","subitem_text_language":"en"},{"subitem_text_value":"Tokyo University of Agriculture and Technology","subitem_text_language":"en"},{"subitem_text_value":"Keio University","subitem_text_language":"en"},{"subitem_text_value":"Corporate Research and Development Center,Toshiba","subitem_text_language":"en"},{"subitem_text_value":"Tokyo University of Agriculture and Technology","subitem_text_language":"en"},{"subitem_text_value":"Keio University","subitem_text_language":"en"},{"subitem_text_value":"Keio University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/23209/files/IPSJ-ARC05163003.pdf"},"date":[{"dateType":"Available","dateValue":"2007-05-31"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC05163003.pdf","filesize":[{"value":"874.6 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"4e56da13-d52f-46a4-a221-8ab863991ceb","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2005 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"宮代, 具隆"},{"creatorName":"宮部, 保雄"},{"creatorName":"伊澤, 徹"},{"creatorName":"北村, 聡"},{"creatorName":"箱崎, 博孝"},{"creatorName":"田邊, 昇"},{"creatorName":"中條, 拓伯"},{"creatorName":"天野, 英晴"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"YASUO, MIYABE","creatorNameLang":"en"},{"creatorName":"AKIRA, KITAMURA","creatorNameLang":"en"},{"creatorName":"YOSHIHIRO, HAMADA","creatorNameLang":"en"},{"creatorName":"TOMOTAKA, MIYASIRO","creatorNameLang":"en"},{"creatorName":"TETSU, IZAWA","creatorNameLang":"en"},{"creatorName":"NOBORU, TANABE","creatorNameLang":"en"},{"creatorName":"HIRONORI, NAKAJO","creatorNameLang":"en"},{"creatorName":"HIDEHARU, AMANO","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"本研究では、メモリスロット装着型ネットワークインタフェースであるDIMMnet-2上に、プリフェッチ機構を備えたReadモジュールを設計・実装した。このプリフェッチ機構は、ベクトル命令によって不連続なデータへ効率的にアクセスを行うことができる。また、対角要素を対象とする行列計算にベクトル命令を実際に適用し、現時点で約18%の処理時間短縮が可能であることを示した。","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"DIMMnet-2 is a network interface for PC cluster, plugged into a DIMM slot. Connecting network interface into commonly used memory bus reduces the cost ofbuilding PC cluster compared with using expensive machines with recent high performance I/O bus like PCI-X. Moreover, low latency communication from the host CPU can be achieved.In this paper, implementation of the mechanisms for lowlatency communication on DIMMnet-2 by making the best use of the memory slot is shown.Its latency for data transfer is lower than those of InfiniBand or QsNET II.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"18","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告計算機アーキテクチャ（ARC）"}],"bibliographicPageStart":"13","bibliographicIssueDates":{"bibliographicIssueDate":"2005-05-31","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"56(2005-ARC-163)","bibliographicVolumeNumber":"2005"}]},"relation_version_is_last":true,"weko_creator_id":"1"}}