{"updated":"2025-01-22T20:33:02.635473+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00023162","sets":["1164:1579:1592:1597"]},"path":["1597"],"owner":"1","recid":"23162","title":["Alphaアーキテクチャ用COINSマシン記述の実装とGCCとの比較"],"pubdate":{"attribute_name":"公開日","attribute_value":"2006-01-24"},"_buckets":{"deposit":"84eeb33b-0e37-40bb-8083-3206647bcc35"},"_deposit":{"id":"23162","pid":{"type":"depid","value":"23162","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"Alphaアーキテクチャ用COINSマシン記述の実装とGCCとの比較","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"Alphaアーキテクチャ用COINSマシン記述の実装とGCCとの比較"},{"subitem_title":"The COINS TMD Implementation for the Alpha Architecture and Its Performance Comparison with GCC","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2006-01-24","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"電気通信大学大学院情報システム学研究科"},{"subitem_text_value":"電気通信大学大学院情報システム学研究科"},{"subitem_text_value":"電気通信大学大学院情報システム学研究科"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Information Systems The University of Electro & Communications","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Information Systems The University of Electro & Communications","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Information Systems The University of Electro & Communications","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/23162/files/IPSJ-ARC06166009.pdf"},"date":[{"dateType":"Available","dateValue":"2008-01-24"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC06166009.pdf","filesize":[{"value":"892.3 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"eeb2ede8-1dcd-41fe-a959-56e5c461d633","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2006 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"塚本, 智博"},{"creatorName":"吉瀬, 謙二"},{"creatorName":"弓場, 敏嗣"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"TOMOHIRO, TSUKAMOTO","creatorNameLang":"en"},{"creatorName":"KENJI, KISE","creatorNameLang":"en"},{"creatorName":"TOSHITSUGU, YUBA","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"Alphaアーキテクチャ用のマシン記述を実装することによって，コンパイラインフラストラクチャとしてのCOINS（Compiler Infrastructure）の有効性を検証する．具体的には，開発の時間軸に沿って，Alphaアーキテクチャ用のマシン記述の実装の詳細を示し，容易に新しいターゲットアーキテクチャのマシン記述が生成できることを明らかにする．また，COINSコンパイラとGCCで生成したオブジェクトコードの速度比較により，GCCと比較して，平均で25％の速度低下に抑えたコンパイラを構築できることを確認する．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"We verify the effectiveness of the COINS by implementing the machine description for the Alpha Architecture. For this purpose, we demonstrate the detail process of the Alpha TMD implementation in accordance with time. And we show that machine description of the new target architecture is easily obtained. Then, we compare the performance of the COINS with GCC. We conclude that the COINS is acceptable since it is only 25% slower than GCC on average.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"54","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告計算機アーキテクチャ（ARC）"}],"bibliographicPageStart":"49","bibliographicIssueDates":{"bibliographicIssueDate":"2006-01-24","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"8(2006-ARC-166)","bibliographicVolumeNumber":"2006"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"created":"2025-01-18T22:54:38.519343+00:00","id":23162,"links":{}}