{"updated":"2025-01-19T10:43:00.295756+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00231569","sets":["6164:6165:9654:11509"]},"path":["11509"],"owner":"44499","recid":"231569","title":["Using Low Power Coprocessors in an FRP Language for Embedded Systems"],"pubdate":{"attribute_name":"公開日","attribute_value":"2023-12-20"},"_buckets":{"deposit":"a19dbcaf-d74b-4917-a147-f9e68bc258d7"},"_deposit":{"id":"231569","pid":{"type":"depid","value":"231569","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"Using Low Power Coprocessors in an FRP Language for Embedded Systems","author_link":["625290","625295","625297","625292","625293","625294","625296","625291"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"Using Low Power Coprocessors in an FRP Language for Embedded Systems"},{"subitem_title":"Using Low Power Coprocessors in an FRP Language for Embedded Systems","subitem_title_language":"en"}]},"item_type_id":"18","publish_date":"2023-12-20","item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_18_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"Department of Computer Science, Tokyo Institute of Technology"},{"subitem_text_value":"Department of Computer Science, Tokyo Institute of Technology"},{"subitem_text_value":"Department of Computer Science, Tokyo Institute of Technology"},{"subitem_text_value":"Department of Computer Science, Tokyo Institute of Technology"}]},"item_18_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Department of Computer Science, Tokyo Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Department of Computer Science, Tokyo Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Department of Computer Science, Tokyo Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Department of Computer Science, Tokyo Institute of Technology","subitem_text_language":"en"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/231569/files/IPSJ-APRIS2023001.pdf","label":"IPSJ-APRIS2023001.pdf"},"date":[{"dateType":"Available","dateValue":"2023-12-20"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-APRIS2023001.pdf","filesize":[{"value":"3.3 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"5"},{"tax":["include_tax"],"price":"0","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"42"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"7c307dfc-7fc8-4796-bdeb-310b057cc88c","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2023 by the Information Processing Society of Japan"}]},"item_18_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Go, Suzuki"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Akihiko, Yokoyama"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Sosuke, Moriguchi"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Takuo, Watanabe"}],"nameIdentifiers":[{}]}]},"item_18_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Go, Suzuki","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Akihiko, Yokoyama","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Sosuke, Moriguchi","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Takuo, Watanabe","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_5794","resourcetype":"conference paper"}]},"item_18_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"A low power coprocessor in the microcontroller helps to save total power consumption. While the main processor is in a sleep state, the low power coprocessor can process the inputs and maintain responsiveness. However, inter-processor communication and processor power state management make development more complicated. In this paper, we address this problem by introducing a mechanism to switch a running processor to the functional reactive programming (FRP) language XStorm, which has an abstraction mechanism for modeling stateful behaviors. The proposed mechanism allows us to choose which processor to run in each state. Therefore, the switching of a running processor can be represented as a state transition. Our compiler can absorb differences in processor architectures and automatically generate programs for inter-processor communication and processor state management. As a result, developers can more easily describe system with coprocessors. We describe the proposed mechanism and report an evaluation on the power consumption and time of state transitions.","subitem_description_type":"Other"}]},"item_18_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"A low power coprocessor in the microcontroller helps to save total power consumption. While the main processor is in a sleep state, the low power coprocessor can process the inputs and maintain responsiveness. However, inter-processor communication and processor power state management make development more complicated. In this paper, we address this problem by introducing a mechanism to switch a running processor to the functional reactive programming (FRP) language XStorm, which has an abstraction mechanism for modeling stateful behaviors. The proposed mechanism allows us to choose which processor to run in each state. Therefore, the switching of a running processor can be represented as a state transition. Our compiler can absorb differences in processor architectures and automatically generate programs for inter-processor communication and processor state management. As a result, developers can more easily describe system with coprocessors. We describe the proposed mechanism and report an evaluation on the power consumption and time of state transitions.","subitem_description_type":"Other"}]},"item_18_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"8","bibliographic_titles":[{"bibliographic_title":"Proceedings of Asia Pacific Conference on Robot IoT System Development and Platform"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2023-12-20","bibliographicIssueDateType":"Issued"},"bibliographicVolumeNumber":"2023"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"created":"2025-01-19T01:31:56.897601+00:00","id":231569,"links":{}}