{"links":{},"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00023100","sets":["1164:1579:1592:1595"]},"path":["1595"],"owner":"1","recid":"23100","title":["消費電力をso％削減する動的電圧/周波数制御型ＨＺ６４/AyCHDTVデコーダアーキテクチャ"],"pubdate":{"attribute_name":"公開日","attribute_value":"2006-06-08"},"_buckets":{"deposit":"e1b74469-c5ea-4f7e-ba77-bbce44251a73"},"_deposit":{"id":"23100","pid":{"type":"depid","value":"23100","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"消費電力をso％削減する動的電圧/周波数制御型ＨＺ６４/AyCHDTVデコーダアーキテクチャ","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"消費電力をso％削減する動的電圧/周波数制御型ＨＺ６４/AyCHDTVデコーダアーキテクチャ"},{"subitem_title":"Dynamic Voltage Scaling in an Elastic Pipeline and Its Application to an H.264/AVC HDTV Video Decoder LSI ","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2006-06-08","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"神戸大学大学院自然科学研究科"},{"subitem_text_value":"金沢大学大学院自然科学研究科"},{"subitem_text_value":"神戸大学大学院自然科学研究科"},{"subitem_text_value":"神戸大学工学部院情報知能工学科"},{"subitem_text_value":"神戸大学工学部院情報知能工学科"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Science and Technology, Kobe University ","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Natural Science & Technology, Kanazawa University ","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Natural Science & Technology, Kanazawa University ","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Natural Science & Technology, Kanazawa University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Natural Science & Technology, Kanazawa University ","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/23100/files/IPSJ-ARC06168006.pdf"},"date":[{"dateType":"Available","dateValue":"2008-06-08"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC06168006.pdf","filesize":[{"value":"907.8 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"e96282ea-3ec5-48cb-9652-63777d21c420","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2006 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"川上, 健太郎"},{"creatorName":"竹村, 淳"},{"creatorName":"黒田, 光彦"},{"creatorName":"川口, 博"},{"creatorName":"吉本, 雅彦"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Kentaro, KAWAKAMI","creatorNameLang":"en"},{"creatorName":"Jun, TAKEMURA","creatorNameLang":"en"},{"creatorName":"Mitsuhiko, KURODA","creatorNameLang":"en"},{"creatorName":"Hiroshi, KAWAGUCHI","creatorNameLang":"en"},{"creatorName":"Masahiko, YOSHIMOTO","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"専用LSI回路に対して動的電圧スケーリングを適用可能にするエラスティックパイプラインアーキテクチャを提案する．提案アーキテクチャの適用例としてＨ264/AVCIDTVデコーダへの適用を検討した．提案アーキテクチャはH264mTVデコードの処理サイクル数を最大48％削減することができる．削減されたサイクルを利用してＤＶＳを適用した場合 90 ｍプロセスにおいてＨ264/AVCIDTVデコーダの消費電力をクロックゲーテイング手法と比較して最大50％削減できることが見積もられた．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"We propose an elastic pipeline that can apply dynamic voltage scaling (DVS) to hardwired logic circuits. In order to demonstrate its feasibility, a hardwired H.264/AVC HDTV decoder is designed as a real-time application. The designed decoder reduces 48% of execution cycles for H.264 HDTV decoding. In case of DVS is applied with this reduced cycles, the proposed decoder achieves a power reduction of 50% in a 90-nm process technology, compared to the conventional clock-gating scheme. ","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"36","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告計算機アーキテクチャ（ARC）"}],"bibliographicPageStart":"31","bibliographicIssueDates":{"bibliographicIssueDate":"2006-06-08","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"62(2006-ARC-168)","bibliographicVolumeNumber":"2006"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"updated":"2025-01-22T20:34:32.759270+00:00","created":"2025-01-18T22:54:35.792270+00:00","id":23100}