{"links":{},"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00229534","sets":["6504:11436:11437"]},"path":["11437"],"owner":"44499","recid":"229534","title":["RTLで設計可能なFPGA回路のためのCAD開発"],"pubdate":{"attribute_name":"公開日","attribute_value":"2023-02-16"},"_buckets":{"deposit":"9c5e3cdb-d402-4e32-b5dc-1a056fc1f008"},"_deposit":{"id":"229534","pid":{"type":"depid","value":"229534","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"RTLで設計可能なFPGA回路のためのCAD開発","author_link":["617388","617387"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"RTLで設計可能なFPGA回路のためのCAD開発"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"コンピュータシステム","subitem_subject_scheme":"Other"}]},"item_type_id":"22","publish_date":"2023-02-16","item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_22_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"北星学園大"},{"subitem_text_value":"北星学園大"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/229534/files/IPSJ-Z85-1A-02.pdf","label":"IPSJ-Z85-1A-02.pdf"},"date":[{"dateType":"Available","dateValue":"2023-11-17"}],"format":"application/pdf","filename":"IPSJ-Z85-1A-02.pdf","filesize":[{"value":"569.3 kB"}],"mimetype":"application/pdf","accessrole":"open_date","version_id":"34a57fe1-1430-4db9-a8da-60dd03b1823d","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2023 by the Information Processing Society of Japan"}]},"item_22_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"佐藤, 友暁"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"豊嶋, 真帆"}],"nameIdentifiers":[{}]}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_5794","resourcetype":"conference paper"}]},"item_22_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN00349328","subitem_source_identifier_type":"NCID"}]},"item_22_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"FPGAを使用した処理は再構成可能であり並列処理が容易である。しかしFPGAはASICに比べて動作周波数が遅い問題がある。この問題を解決するために, 著者らはRTLで設計可能なFPGAを提案してきた。このFPGAはLB, CB, SBの３つのブロックとそれらを接続する配線で構成されている。RTLで設計可能であるためFPGAとASICの協調設計が容易に実現可能である。FPGAにおいてはFPGA上で動作する回路を設計するCADツールが不可欠であるが実現されていない。本論文では, FPGA上のCBのためのCADツールのアルゴリズムを提案し, Pythonを使用してこのアルゴリズムの検証を行う。","subitem_description_type":"Other"}]},"item_22_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"4","bibliographic_titles":[{"bibliographic_title":"第85回全国大会講演論文集"}],"bibliographicPageStart":"3","bibliographicIssueDates":{"bibliographicIssueDate":"2023-02-16","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"1","bibliographicVolumeNumber":"2023"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"created":"2025-01-19T01:28:44.885864+00:00","updated":"2025-01-19T11:31:21.429753+00:00","id":229534}