{"updated":"2025-01-22T20:40:27.396851+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00022913","sets":["1164:1579:1585:1587"]},"path":["1587"],"owner":"1","recid":"22913","title":["非均一分散環境における並列性の仮想化"],"pubdate":{"attribute_name":"公開日","attribute_value":"2007-11-22"},"_buckets":{"deposit":"f9adbc35-b94f-4f73-8c3e-88a016a55190"},"_deposit":{"id":"22913","pid":{"type":"depid","value":"22913","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"非均一分散環境における並列性の仮想化","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"非均一分散環境における並列性の仮想化"},{"subitem_title":"Parallelism abstraction of distributed heterogeneous computing eivironment","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2007-11-22","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"電気通信大学／独立行政法人科学技術振興機構，CREST"},{"subitem_text_value":"電気通信大学／独立行政法人科学技術振興機構，CREST"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"The University of Electro-Communications / JST","subitem_text_language":"en"},{"subitem_text_value":"The University of Electro-Communications / JST","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/22913/files/IPSJ-ARC07175011.pdf"},"date":[{"dateType":"Available","dateValue":"2009-11-22"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC07175011.pdf","filesize":[{"value":"565.0 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"d8cfbb9f-6eab-427f-83db-e4e78d48ba6f","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2007 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"平澤, 将一"},{"creatorName":"本多, 弘樹"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Shoichi, HIRASAWA","creatorNameLang":"en"},{"creatorName":"Hiroki, HONDA","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"マルチコア CPU，クラスタ，グリッドなど，並列実行環境がますます広がりを見せている．共有メモリから分散メモリ，均一 CPU コアから非均一 CPU コアへの広がりがシステムアーキテクチャを複雑化させている．各並列実行環境でそれぞれ別のプログラミングインタフェース，プログラミングモデルが用いられており，ユーザに負担となるためそれら並列実行環境の普及を妨げている．本稿では，これらのシステムアーキテクチャをメモリ資源，CPU 資源で統一的に扱う実行モデルを探ることにより非均一で分散メモリ型のシステムアーキテクチャを対象とする統一的なプログラミングインタフェース，プログラミングモデルの実現方法および問題点の考察を行う．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"Parallel execution environment, such as the multi-core CPU, a cluster, and a grid, shows a spread increasingly. A spread from a shared memory to the distributed memory and the homogenious multi-core CPU to the heterogenious multi-core CPU has made system architecture complicate. The respectively different programming interface and the programming model are used in each parallel execution environment, and since it becomes a burden to users and prevents these parallel execution environment spread. In this paper, we consider distributed memory and hetero-genious architecture as a general programming model and consider how to realize a unified programming interface for the distributed heterogenious system architecture.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"60","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告計算機アーキテクチャ（ARC）"}],"bibliographicPageStart":"57","bibliographicIssueDates":{"bibliographicIssueDate":"2007-11-22","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"115(2007-ARC-175)","bibliographicVolumeNumber":"2007"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"created":"2025-01-18T22:54:27.536461+00:00","id":22913,"links":{}}