{"updated":"2025-01-19T11:41:07.105144+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00228879","sets":["1164:2036:11089:11372"]},"path":["11372"],"owner":"44499","recid":"228879","title":["多重量子化オプティマイザを用いたエッジAIオンライン学習アーキテクチャの提案"],"pubdate":{"attribute_name":"公開日","attribute_value":"2023-11-10"},"_buckets":{"deposit":"a087f070-aaf2-4633-8fd9-562ac3558733"},"_deposit":{"id":"228879","pid":{"type":"depid","value":"228879","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"多重量子化オプティマイザを用いたエッジAIオンライン学習アーキテクチャの提案","author_link":["614490","614491","614492","614487","614485","614489","614488","614486"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"多重量子化オプティマイザを用いたエッジAIオンライン学習アーキテクチャの提案"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"アーキテクチャ・CiM","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2023-11-10","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"北海道大学大学院情報科学研究院"},{"subitem_text_value":"北海道大学工学部"},{"subitem_text_value":"北海道大学大学院情報科学研究院"},{"subitem_text_value":"北海道大学大学院情報科学研究院"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Faculty of Information Science and Technology, Hokkaido University","subitem_text_language":"en"},{"subitem_text_value":"School of Engineering , Hokkaido University","subitem_text_language":"en"},{"subitem_text_value":"Faculty of Information Science and Technology, Hokkaido University","subitem_text_language":"en"},{"subitem_text_value":"Faculty of Information Science and Technology, Hokkaido University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/228879/files/IPSJ-SLDM23204012.pdf","label":"IPSJ-SLDM23204012.pdf"},"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM23204012.pdf","filesize":[{"value":"2.0 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_login","version_id":"4fa7fa57-5600-4144-9530-80426599305b","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2023 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"明野, 樹紀"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"山崎, 比伊呂"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"浅井, 哲也"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"安藤, 洸太"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Itsuki, Akeno","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Hiiro, Yamazaki","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Tetsuya, Asai","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Kota, Ando","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8639","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"本研究ではニューラルネットワークによる学習のできるハードウェアのアーキテクチャを検討評価し，その FPGA 実装を行った．現在ニューラルネットワークを用いた AI は広く使われており，AI の学習計算をするための専用ハードウェアの開発が急がれている．そこでハードウェア指向のオプティマイザとして Holmes があり，これを用いると他のオプティマイザに比べて小さいメモリの割に早い収束をする学習ができることがわかっている．よって本論文では Holmes を搭載し，また並列化とパイプライン化によって大きなスループットが出せるハードウェアのアーキテクチャを提案した．また，そのアーキテクチャをもとにプロトタイプとして XOR，NOR の学習を行うハードウェアを FPGA に実装し，資源の評価を行った．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":" We propose a processor architecture for neural network (NN) training in edge and prototype it on an FPGA (Field--Programmable Gate Array). Currently, neural networks are widely employed in artificial intelligence (AI), and there is a pressing need for the development of dedicated hardware for edge side AI training. To address this demand, the Holmes optimizer has been proposed and proved to have capability of faster convergence with a smaller memory footprint compared to other optimizers. Therefore, this paper presents a hardware architecture that incorporates Holmes and leverages parallelization and pipelining techniques to achieve significant throughput improvements. Furthermore, based on this architecture, we evalu- ated the hardware resource consumption of the proposed architecture by implementing it on an FPGA. This research focuses on proposing a hardware architecture suitable for neural network learning and its FPGA implementation. It contributes to the advancement of hardware for neural network-based AI learning, which is of paramount importance given the widespread usage of neural networks in AI applications.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システムとLSIの設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2023-11-10","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"12","bibliographicVolumeNumber":"2023-SLDM-204"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"created":"2025-01-19T01:28:00.760970+00:00","id":228879,"links":{}}