{"links":{},"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00222447","sets":["1164:2036:10820:11033"]},"path":["11033"],"owner":"44499","recid":"222447","title":["遅延検査容易化設計を用いるPUF回路の周囲温度による動作性能調査"],"pubdate":{"attribute_name":"公開日","attribute_value":"2022-11-21"},"_buckets":{"deposit":"27aed99c-54da-4674-be17-518051709d8b"},"_deposit":{"id":"222447","pid":{"type":"depid","value":"222447","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"遅延検査容易化設計を用いるPUF回路の周囲温度による動作性能調査","author_link":["583734","583731","583730","583729","583732","583733"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"遅延検査容易化設計を用いるPUF回路の周囲温度による動作性能調査"},{"subitem_title":"On the Performance Evaluation of a PUF Circuit Using the Delay Testable Circuit under Temperature Effects","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"高信頼LSI設計と評価","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2022-11-21","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"徳島大学大学院創成科学研究科電気電子システムコース"},{"subitem_text_value":"徳島大学大学院社会産業理工学研究部"},{"subitem_text_value":"徳島大学大学院社会産業理工学研究部"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Advanced Technology and Science, Tokushima University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Technology, Industrial and Social Sciences, Tokushima University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Technology, Industrial and Social Sciences, Tokushima University ","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/222447/files/IPSJ-SLDM22200028.pdf","label":"IPSJ-SLDM22200028.pdf"},"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM22200028.pdf","filesize":[{"value":"1.8 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_login","version_id":"b23d1600-20fe-4cde-9c23-b2b960646e9c","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2022 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"大濱, 瑛祐"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"四柳, 浩之"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"橋爪, 正樹"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Eisuke, Ohama","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Hiroyuki, Yotsuyanagi","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Masaki, Hashizume","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8639","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"本研究では，遅延検査容易化設計をセキュリティ技術としても機能させることを目的として，遅延検査容易化回路と PUF 回路を併用するための手法を提案している．過去に提案手法により生成した固有値は PUF として利用可能であることは確認している．しかし，周囲温度変動が提案回路を用いた PUF 回路の性能に影響があるかの調査は行われていない．そのため，異なる周囲温度のもとで試作 IC の実測を行い，生成した固有値の PUF 性能の調査を行った．その結果，一意性・安定性がともに高いことを確認した．また，生成した固有値に基づきチップ間での個体識別が可能であることも確認した．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"In this study, we have proposed a method to make the design-for-testability circuity function as a security mechanism by combining a delay testable circuit based on boundary scan design and a PUF (physically unclonable function) circuit. We have already confirmed that the unique values generated by the proposed circuit can be utilized as a PUF. However, it is not evaluated whether the proposed circuit can be available as a PUF under temperature variations. In this paper, we investigate the prototype IC under varying temperatures and evaluate the generated unique values for evaluating PUF performance. The results show that the proposed circuit has both high uniqueness and stability. We also confirmed the generated unique values can achieve the individual identification of chips.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システムとLSIの設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2022-11-21","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"28","bibliographicVolumeNumber":"2022-SLDM-200"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"created":"2025-01-19T01:22:24.156628+00:00","updated":"2025-01-19T13:44:52.372868+00:00","id":222447}