{"created":"2025-01-19T01:19:20.949700+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00219010","sets":["1164:1579:10818:10973"]},"path":["10973"],"owner":"44499","recid":"219010","title":["並列化に伴うデータ空間の分割とそれによるアクセスパターンの変化がもたらすHBMの振る舞い調査"],"pubdate":{"attribute_name":"公開日","attribute_value":"2022-07-20"},"_buckets":{"deposit":"cd752b04-72e9-4d76-a67a-2ca6a476a3a1"},"_deposit":{"id":"219010","pid":{"type":"depid","value":"219010","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"並列化に伴うデータ空間の分割とそれによるアクセスパターンの変化がもたらすHBMの振る舞い調査","author_link":["570735","570733","570732","570731","570730","570734"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"並列化に伴うデータ空間の分割とそれによるアクセスパターンの変化がもたらすHBMの振る舞い調査"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"メモリ","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2022-07-20","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"筑波大学大学院理工情報生命学術院"},{"subitem_text_value":"筑波大学大学院理工情報生命学術院(現: 富士フイルムソフトウエア株式会社)"},{"subitem_text_value":"筑波大学システム情報系"},{"subitem_text_value":"筑波大学計算科学研究センター"},{"subitem_text_value":"筑波大学計算科学研究センター"},{"subitem_text_value":"筑波大学計算科学研究センター"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/219010/files/IPSJ-ARC22249021.pdf","label":"IPSJ-ARC22249021.pdf"},"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC22249021.pdf","filesize":[{"value":"3.2 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_login","version_id":"e65550d9-e664-45f9-8cce-c1ec2ac2d0eb","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2022 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"瀬口, 知洋"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"中井, 榛希"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"山口, 佳樹"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"藤田, 典久"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"小林, 諒平"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"朴, 泰祐"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8574","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"アプリケーションの要求に合わせて演算回路を電気的に再構成可能な Field Programmable Gate Array (FPGA) は，半導体製造技術およびパッケージング技術などの進化に伴いその演算性能および機能を大きく改善させてきた．また，高位合成採用などによる統合開発環境の熟成とそれによる設計の簡素化は FPGA の導入コストを大きく下げることに成功し，FPGA は情報システムに広く採用されるに至っている．以上より FPGA は，GPU や AI チップなどと同様に多くの注目を集めるデバイスとして，また，演算性能向上や消費電力対性能の改善など，導入に対して得られる効果を十分に期待できるデバイスとして認知され始めている．そして近年，高性能計算分野において帯域幅の大きなメモリ（High Bandwidth Memory: HBM) を同一パッケージ内に採用した FPGA 製品が増加しており，それは低価格帯の組み込み系 FPGA 製品にも広がりつつある．一方，HBM を採用して一日の長である GPU 分野において，HBM の実効アクセス性能に対する議論が始まりつつある．そこで本報告では，FPGA における高位記述と HBM 利用との組みあわせについて整理し，今後の FPGA 設計・開発における問題提起を通して効率的な演算加速の可能性について議論する．","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システム・アーキテクチャ（ARC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2022-07-20","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"21","bibliographicVolumeNumber":"2022-ARC-249"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"id":219010,"updated":"2025-01-19T14:57:23.025519+00:00","links":{}}