{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00219005","sets":["1164:1579:10818:10973"]},"path":["10973"],"owner":"44499","recid":"219005","title":["DNN推論高速化のためのSRAMベース近似デジタル乗算器の提案"],"pubdate":{"attribute_name":"公開日","attribute_value":"2022-07-20"},"_buckets":{"deposit":"678c1a80-76ee-418e-a5e1-29b28f32fe08"},"_deposit":{"id":"219005","pid":{"type":"depid","value":"219005","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"DNN推論高速化のためのSRAMベース近似デジタル乗算器の提案","author_link":["570703","570700","570702","570701"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"DNN推論高速化のためのSRAMベース近似デジタル乗算器の提案"},{"subitem_title":"An SRAM-Based Approximate Digital Multiplier for DNN Inference Acceleration","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"アクセラレータ","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2022-07-20","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"慶応義塾大学"},{"subitem_text_value":"慶応義塾大学"},{"subitem_text_value":"慶応義塾大学"},{"subitem_text_value":"慶応義塾大学／理化学研究所"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/219005/files/IPSJ-ARC22249016.pdf","label":"IPSJ-ARC22249016.pdf"},"date":[{"dateType":"Available","dateValue":"2024-07-20"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC22249016.pdf","filesize":[{"value":"693.4 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"a110202d-40f9-475e-9d64-b515f95d2d3f","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2022 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"ソニーノ, ロレンツォ"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"シュレスタマリ, サソット"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"和, 遠"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"近藤, 正章"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8574","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"半導体プロセス技術が進歩し，Deep Learning が普及・発展するにつれ，モデルの学習・評価に必要な計算量も増加している．メモリがボトルネックとなる中，Deep Learning アクセラレータの能力を向上させ，高性能かつ低エネルギーコンピューティングの要求に応えるため，さまざまな In-Memory-Computation 技術が登場している．本稿では，従来の乗算器と比較して，カーネル保存に 34 倍のメモリを使用し，精度を約 1.7% しか犠牲にしないことで，約 19% のエネルギーを使用しながら遅延を 95% 削減する，新しい SRAM ベースの Processing-In-Memory 近似乗算器を提案する．また，これらのトレードオフを調整するために，他のバリエーションも提案し，遅延とエネルギー消費を犠牲にして必要なメモリを削減している．提案アーキテクチャは，あらかじめ計算された部分積を SRAM メモリに格納し，乗算値に基づいて複数のワード線活性化により加算する．そのため，部分積の加算は，わずかに変更された SRAM により，乗算器の読み出し時にビット単位の OR 演算で行われる．このため，事前計算された部分和を格納するためのメモリ要件が増加し，ビット毎 OR の間に現れる衝突により精度が低下するが，低レイテンシと低エネルギーでの計算が可能になる．本文では，これらのトレードオフを検討し，標準的なシストリックアレイと同様のアーキテクチャを提案する．","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システム・アーキテクチャ（ARC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2022-07-20","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"16","bibliographicVolumeNumber":"2022-ARC-249"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"id":219005,"updated":"2025-01-19T14:57:29.198261+00:00","links":{},"created":"2025-01-19T01:19:20.667124+00:00"}