{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00216067","sets":["1164:2036:10820:10821"]},"path":["10821"],"owner":"44499","recid":"216067","title":["小容量キャッシュの追加によるマルチバンク一次データ・キャッシュの疑似デュアルポート化"],"pubdate":{"attribute_name":"公開日","attribute_value":"2022-01-17"},"_buckets":{"deposit":"9cb06fd1-f271-4452-9f9c-3dc37ed1b0ed"},"_deposit":{"id":"216067","pid":{"type":"depid","value":"216067","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"小容量キャッシュの追加によるマルチバンク一次データ・キャッシュの疑似デュアルポート化","author_link":["557222","557221","557224","557223"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"小容量キャッシュの追加によるマルチバンク一次データ・キャッシュの疑似デュアルポート化"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"アーキテクチャ","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2022-01-17","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"富士通株式会社"},{"subitem_text_value":"富士通株式会社"},{"subitem_text_value":"東京大学"},{"subitem_text_value":"国立情報学研究所"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Fujitsu Limited","subitem_text_language":"en"},{"subitem_text_value":"Fujitsu Limited","subitem_text_language":"en"},{"subitem_text_value":"The University of Tokyo","subitem_text_language":"en"},{"subitem_text_value":"National Institute of Informatics","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/216067/files/IPSJ-SLDM22197010.pdf","label":"IPSJ-SLDM22197010.pdf"},"date":[{"dateType":"Available","dateValue":"2024-01-17"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM22197010.pdf","filesize":[{"value":"2.3 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"394cc60c-bcd7-42a3-be87-674d218e833a","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2022 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"依田, 勝洋"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"吉川, 隆英"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"塩谷, 亮太"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"五島, 正裕"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8639","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"近年，疎行列を扱う処理を中心に不連続なデータデータにアクセスするギャザーロードの高性能化への要求が高まっており，これに対応して L1D キャッシュのマルチバンク化技術が提案されている．しかしながら，マルチバンク化によっても特定バンクへのアクセス競合が発生する場合には十分な性能向上を得られない．そこで，本稿では各バンクにバンクのメモリサイズよりも小さなサブデータアレイキャッシュ（SDAC）の設置を提案する．SDAC のデータ出力ポートは，競合を起こした当該バンクとは異なる隣接バンクの出力ポートとセレクタを介して合流するため，当該バンクは疑似的にデュアルポート化される．そして，アクセス競合が発生した時に SDAC は負けたアクセスが使うはずであったデータとそのアドレスをキャッシュし，再度同じアクセス競合が発生した際に隣接バンクのポートを使って競合アクセスを処理することで競合による性能低下を軽減する．本技術の競合解消の効果を HPC 分野で用いられる大規模疎行列へのアクセス時について見積もるため，HPCG 並びに SuiteSparse Matrix Collection に収録されているいくつかの疎行列に対するアクセス競合数を机上計算した結果，2 ライン程度の SDAC を各バンクに持たせることで競合の回数を最大 33% 削減出来ることが分かった．","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"7","bibliographic_titles":[{"bibliographic_title":"研究報告システムとLSIの設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2022-01-17","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"10","bibliographicVolumeNumber":"2022-SLDM-197"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"id":216067,"updated":"2025-01-19T15:56:37.024154+00:00","links":{},"created":"2025-01-19T01:16:47.679005+00:00"}