@techreport{oai:ipsj.ixsq.nii.ac.jp:00214049,
 author = {ミアリアーズ, ウル ハック and 新谷, 道広 and Riaz-ul-haque, Mian and Michihiro, Shintani},
 issue = {34},
 month = {Nov},
 note = {少数の測定結果からウェーハ全体のチップ特性予測手法は，量産テストのテスト品質を損なうことなくテストコストを削減する手法として注目を集めている．本論文では，高周波（Radio frequency, RF）回路の同時測定テストに向けたウェーハレベル特性予測モデル化手法を提案する．RF 回路の同時測定では，プローブ回路の寄生成分に起因するサイト間の特性ばらつきが顕在化するが，提案手法は，ガウス過程によるモデル化をサイト毎に階層的に行うことで，推定精度の向上を図る．さらに，実測数の最小化を目的に，アクティブサンプリング方法を提案する．RF 回路の量産データを用いた評価により，既存手法と比べて，提案手法は推定誤差を 1/19 に低減できることを示す．さらに，提案サンプリング手法により，十分な推定精度を保持しつつ，測定数を 97 ％削減できた．, Wafer-level performance prediction has been attracting attention to reduce measurement costs without compromising test quality in production tests. Although several efficient methods have been proposed, the site-to-site variation, which is often observed in multi-site testing for radio frequency circuits, has not yet been addressed. In this paper, we propose a wafer-level performance prediction method for multi-site testing that can consider the site-to-site variation. The proposed method is based on the Gaussian process, improving the prediction accuracy by extending hierarchical modeling to exploit the test site information provided by test engineers. In addition, we propose an active test-site sampling method to maximize measurement cost reduction. Through experiments using production test data, we demonstrate that the proposed method can reduce the estimation error to 1/19 of that obtained using a conventional method. We also demonstrate that the proposed sampling method can reduce the number of the measurements by 97% while achieving sufficient estimation accuracy.},
 title = {RF 回路の同時測定におけるウェハー面上ダイ特性ばらつきモデル化},
 year = {2021}
}