{"updated":"2025-01-19T16:55:27.587555+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00214047","sets":["1164:2036:10484:10753"]},"path":["10753"],"owner":"44499","recid":"214047","title":["重力多体問題を例とした高位合成ツールの性能比較~SDSoC とVitisの違いについて~"],"pubdate":{"attribute_name":"公開日","attribute_value":"2021-11-24"},"_buckets":{"deposit":"8b22219e-e7f6-4be7-b60a-106d153809b2"},"_deposit":{"id":"214047","pid":{"type":"depid","value":"214047","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"重力多体問題を例とした高位合成ツールの性能比較~SDSoC とVitisの違いについて~","author_link":["548402","548403"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"重力多体問題を例とした高位合成ツールの性能比較~SDSoC とVitisの違いについて~"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"高位合成設計","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2021-11-24","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"電気通信大学情報理工学研究科"},{"subitem_text_value":"電気通信大学情報理工学研究科"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/214047/files/IPSJ-SLDM21196032.pdf","label":"IPSJ-SLDM21196032.pdf"},"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM21196032.pdf","filesize":[{"value":"1.7 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_login","version_id":"2182ce3f-205b-4e9c-97ec-95d06beed363","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2021 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"村松, 耀生"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"成見, 哲"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8639","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"FPGA の設計において開発期間短縮のために高位合成が使われ始めており，ハードウェアで行う処理部分を RTL ではなく C 言語等で記述出来る．更にアプリケーション全体に対し高位合成することでソフトウェアとハードウェアのインターフェイス部分も自動で合成可能である．Xilinx 社の高位合成用 FPGA 設計ツールは SDSoC から Vitis に移行したが機能が追加/削除されるなど最適化手法が変化している．そこで本研究では，重力多体問題を例として同じ C のコードを元に SDSoC と Vitis で機能や生成ハードウェアの性能の違いを比較した．Vitis は自動でパイプライン化したり通信ハードウェアが高速であったが，計算速度は SDSoC に劣っていた．","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"5","bibliographic_titles":[{"bibliographic_title":"研究報告システムとLSIの設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2021-11-24","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"32","bibliographicVolumeNumber":"2021-SLDM-196"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"created":"2025-01-19T01:14:53.046259+00:00","id":214047,"links":{}}