{"id":214011,"updated":"2025-01-19T16:56:09.515948+00:00","links":{},"created":"2025-01-19T01:14:50.955543+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00214011","sets":["1164:2036:10484:10753"]},"path":["10753"],"owner":"44499","recid":"214011","title":["FVFを応用したPSRR帯域拡張回路を搭載した脳波計測ウェアラブルデバイス向け低消費LDO"],"pubdate":{"attribute_name":"公開日","attribute_value":"2021-11-24"},"_buckets":{"deposit":"5b4f9ea9-dade-4d5a-ad07-4a6e02528181"},"_deposit":{"id":"214011","pid":{"type":"depid","value":"214011","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"FVFを応用したPSRR帯域拡張回路を搭載した脳波計測ウェアラブルデバイス向け低消費LDO","author_link":["548240","548238","548237","548242","548241","548236","548239","548243"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"FVFを応用したPSRR帯域拡張回路を搭載した脳波計測ウェアラブルデバイス向け低消費LDO"},{"subitem_title":"Low quiescent current LDO with FVF based PSRR enhanced circuit for wearable EEG measurement devices","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"低電力回路技術およびソフトエラー対策","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2021-11-24","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"大阪大学電気電子情報通信工学専攻"},{"subitem_text_value":"大阪大学電気電子情報通信工学専攻"},{"subitem_text_value":"大阪大学電気電子情報通信工学専攻"},{"subitem_text_value":"大阪大学電気電子情報通信工学専攻"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Division of Electrical, Electronic and Information Engineering, Osaka University","subitem_text_language":"en"},{"subitem_text_value":"Division of Electrical, Electronic and Information Engineering, Osaka University","subitem_text_language":"en"},{"subitem_text_value":"Division of Electrical, Electronic and Information Engineering, Osaka University","subitem_text_language":"en"},{"subitem_text_value":"Division of Electrical, Electronic and Information Engineering, Osaka University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/214011/files/IPSJ-SLDM21196002.pdf","label":"IPSJ-SLDM21196002.pdf"},"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM21196002.pdf","filesize":[{"value":"2.1 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_login","version_id":"7dcec24e-826b-460c-aecb-a7ffe4be69e4","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2021 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"三井, 健司"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"兼本, 大輔"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"毎田, 修"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"廣瀬, 哲也"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Kenji, Mii","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Daisuke, Kanemoto","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Osamu, Maida","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Tetsuya, Hirose","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8639","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"本稿では脳波計測ウェアラブルデバイス向けにフリップドボルテージフォロワ（FVF）を応用し PSRR（Power Supply Rejection Ratio）を向上させるための回路を搭載した低消費電流の低ドロップアウトレギュレータ（LDO）を提案する．提案する LDO を 0.18μm の CMOS プロセスを用いて設計し，一般的な構成の LDO と比較して 4kHz において 19dB の PSRR の改善を達成した．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"This paper proposes a low quiescent current low-dropout regulator (LDO) with a flipped voltage follower (FVF)- based power supply rejection ratio (PSRR)-enhanced circuit. The proposed LDO was designed using a 0.18 μm CMOS process. The designed LDO achieved a PSRR that was improved by 19 dB at 4 kHz, compared with the general configuration with almost the same quiescent current.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システムとLSIの設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2021-11-24","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"2","bibliographicVolumeNumber":"2021-SLDM-196"}]},"relation_version_is_last":true,"weko_creator_id":"44499"}}