{"updated":"2025-01-19T16:56:10.582521+00:00","links":{},"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00214010","sets":["1164:2036:10484:10753"]},"path":["10753"],"owner":"44499","recid":"214010","title":["TCADを用いた回路とレイアウト構造によるフリップフロップのソフトエラー耐性の評価"],"pubdate":{"attribute_name":"公開日","attribute_value":"2021-11-24"},"_buckets":{"deposit":"14073f51-5a59-4513-8f3c-84213766a315"},"_deposit":{"id":"214010","pid":{"type":"depid","value":"214010","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"TCADを用いた回路とレイアウト構造によるフリップフロップのソフトエラー耐性の評価","author_link":["548228","548226","548230","548235","548233","548234","548229","548231","548232","548227"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"TCADを用いた回路とレイアウト構造によるフリップフロップのソフトエラー耐性の評価"},{"subitem_title":"Soft Errors on Flip-flops Depending on Circuit and Layout Structures Estimated by TCAD Simulations","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"低電力回路技術およびソフトエラー対策","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2021-11-24","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"京都工芸繊維大学"},{"subitem_text_value":"京都工芸繊維大学"},{"subitem_text_value":"ローム株式会社"},{"subitem_text_value":"京都工芸繊維大学"},{"subitem_text_value":"京都工芸繊維大学"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Kyoto Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Kyoto Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"ROHM Co.,Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Kyoto Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Kyoto Institute of Technology","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/214010/files/IPSJ-SLDM21196001.pdf","label":"IPSJ-SLDM21196001.pdf"},"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM21196001.pdf","filesize":[{"value":"1.1 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_login","version_id":"ce9a3e37-0a8f-428e-8cec-30a0cf0f9f53","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2021 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"小谷, 萌香"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"中島, 隆一"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"井置, 一哉"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"古田, 潤"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"小林, 和淑"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Moeka, Kotani","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Ryuichi, Nakajima","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Kazuya, Ioki","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Jun, Furuta","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Kazutoshi, Kobayashi","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8639","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"本稿では 130 nm プロセスのフリップフロップ（FF）とトランジスタと配線を追加した面積，遅延，電力オーバーヘッドの小さい提案回路のソフトエラー耐性をデバイスシミュレーションを用いて評価した．回路シミュ レーションによるソフトエラー耐性評価ではレイアウト依存性を評価することができない．ここではレイアウト構造を TCAD により再現し，レイアウト依存性の評価を行った．ソフトエラー耐性の低い FF と比較して提案回路の臨界 LET 値は 2.5 倍に増加し，Cross Section は 30% に減少した．実測と回路シミュレーションでソフトエラー耐性の相関係数が 0.34 と低かった測定条件においてデバイスシミュレーションを用いることで相関係数は 0.74 へと向上した．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"We compare the soft error tolerance of conventional flip-flops (FFs) and the proposed radiation-hard FF with small area, delay and power overheads by adding transistors and wires in a 130 nm process by using device simulation. Circuit simulations cannot evaluate layout dependence of soft errors. By constructing layout structures on TCAD, the layout dependence is evaluated. The critical LET of the proposed circuit becomes 2.5x larger than the conventional FF and the cross section of the proposed circuit is decreased to 30%. The correlation coefficient of the soft error tolerance on a specific condition between the measurement results and the circuit simulation results is 0.34, while that between the measurement results and the device simulation results becomes 0.74.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システムとLSIの設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2021-11-24","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"1","bibliographicVolumeNumber":"2021-SLDM-196"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"id":214010,"created":"2025-01-19T01:14:50.896374+00:00"}