{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00213182","sets":["1164:1579:10482:10719"]},"path":["10719"],"owner":"44499","recid":"213182","title":["広帯域外部メモリ搭載型FPGAを用いたSpMVの高速計算に関する考察"],"pubdate":{"attribute_name":"公開日","attribute_value":"2021-10-04"},"_buckets":{"deposit":"e89aac4b-bcc9-45ac-be45-c00c3893b93b"},"_deposit":{"id":"213182","pid":{"type":"depid","value":"213182","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"広帯域外部メモリ搭載型FPGAを用いたSpMVの高速計算に関する考察","author_link":["544966","544963","544964","544968","544967","544965"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"広帯域外部メモリ搭載型FPGAを用いたSpMVの高速計算に関する考察"},{"subitem_title":"A Study for Accelerating SpMV Using FPGA with High Bandwidth Memory","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"FPGA","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2021-10-04","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"筑波大学大学院システム情報工学研究群"},{"subitem_text_value":"筑波大学システム情報系"},{"subitem_text_value":"筑波大学システム情報系"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"University of Tsukuba","subitem_text_language":"en"},{"subitem_text_value":"University of Tsukuba","subitem_text_language":"en"},{"subitem_text_value":"University of Tsukuba","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/213182/files/IPSJ-ARC21246001.pdf","label":"IPSJ-ARC21246001.pdf"},"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC21246001.pdf","filesize":[{"value":"913.3 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_login","version_id":"706c4864-5fd3-4f09-b8c8-ca7500f5f74f","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2021 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"柳澤, 良輔"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"金澤, 健治"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"安永, 守利"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Ryosuke, Yanagisawa","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Kenji, Kanazawa","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Moritoshi, Yasunaga","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8574","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"疎行列・ベクトル積 (Sparse Matrix-Vector Multiplication: SpMV) は，計算科学における多くのアプリケーションにおいて多用される重要な演算である．本稿では，外部メモリとして HBM (High Bandwidth Memory) を搭載 する FPGA を用いた SpMV の高速計算手法について述べる．本手法では，従来手法において行列の非ゼロ要素とベクトル成分との対応付けに用いられている Network-on-Chip 回路の小型化を行い，従来よりも少ないハードウェアリソースで，より高い理論ピーク性能を実現した．本稿では，幾つかのベンチマークを用いた性能評価の結果を示し，更に，本手法で実現可能な並列度の上限と，そのとき期待される性能について議論する．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"Sparse Matrix-Vector Multiplication (SpMV) is a fundamental operation that appears in various computer science applications. In this article, we describe an implemenation of SpMV accelerator on FPGA with High Bandwidth Memories (HBM). We leveraged higher throughput in SpMV calculation with less hardware resources by designing a small-scale Net-work-on-Chip circuits for associating non-zeros in a given sparse matrix with vector elements. We show the evaluation results of our implementation and then discuss the possible maximum performance gain by our proposed approach.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システム・アーキテクチャ（ARC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2021-10-04","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"1","bibliographicVolumeNumber":"2021-ARC-246"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"id":213182,"updated":"2025-01-19T17:14:36.567684+00:00","links":{},"created":"2025-01-19T01:14:05.351937+00:00"}