Item type |
SIG Technical Reports(1) |
公開日 |
2021-03-22 |
タイトル |
|
|
タイトル |
Quantum Gate Pattern Recognition and Circuit Optimization for Scientific Applications |
タイトル |
|
|
言語 |
en |
|
タイトル |
Quantum Gate Pattern Recognition and Circuit Optimization for Scientific Applications |
言語 |
|
|
言語 |
eng |
資源タイプ |
|
|
資源タイプ識別子 |
http://purl.org/coar/resource_type/c_18gh |
|
資源タイプ |
technical report |
著者所属 |
|
|
|
Department of Physics, The University of Tokyo |
著者所属 |
|
|
|
International Center for Elementary Particle Physics (ICEPP), The University of Tokyo |
著者所属 |
|
|
|
International Center for Elementary Particle Physics (ICEPP), The University of Tokyo |
著者所属 |
|
|
|
Physics Division, Lawrence Berkeley National Laboratory |
著者所属 |
|
|
|
Physics Division, Lawrence Berkeley National Laboratory |
著者所属 |
|
|
|
International Center for Elementary Particle Physics (ICEPP), The University of Tokyo |
著者所属 |
|
|
|
International Center for Elementary Particle Physics (ICEPP), The University of Tokyo |
著者所属 |
|
|
|
Department of Physics, The University of Tokyo |
著者所属 |
|
|
|
International Center for Elementary Particle Physics (ICEPP), The University of Tokyo |
著者所属 |
|
|
|
International Center for Elementary Particle Physics (ICEPP), The University of Tokyo |
著者所属(英) |
|
|
|
en |
|
|
Department of Physics, The University of Tokyo |
著者所属(英) |
|
|
|
en |
|
|
International Center for Elementary Particle Physics (ICEPP), The University of Tokyo |
著者所属(英) |
|
|
|
en |
|
|
International Center for Elementary Particle Physics (ICEPP), The University of Tokyo |
著者所属(英) |
|
|
|
en |
|
|
Physics Division, Lawrence Berkeley National Laboratory |
著者所属(英) |
|
|
|
en |
|
|
Physics Division, Lawrence Berkeley National Laboratory |
著者所属(英) |
|
|
|
en |
|
|
International Center for Elementary Particle Physics (ICEPP), The University of Tokyo |
著者所属(英) |
|
|
|
en |
|
|
International Center for Elementary Particle Physics (ICEPP), The University of Tokyo |
著者所属(英) |
|
|
|
en |
|
|
Department of Physics, The University of Tokyo |
著者所属(英) |
|
|
|
en |
|
|
International Center for Elementary Particle Physics (ICEPP), The University of Tokyo |
著者所属(英) |
|
|
|
en |
|
|
International Center for Elementary Particle Physics (ICEPP), The University of Tokyo |
著者名 |
Wonho, Jang
Koji, Terashi
Masahiko, Saito
Christian, W. Bauer
Benjamin, Nachman
Yutaro, Iiyama
Tomoe, Kishimoto
Ryunosuke, Okubo
Ryu, Sawada
Junichi, Tanaka
|
著者名(英) |
Wonho, Jang
Koji, Terashi
Masahiko, Saito
Christian, W. Bauer
Benjamin, Nachman
Yutaro, Iiyama
Tomoe, Kishimoto
Ryunosuke, Okubo
Ryu, Sawada
Junichi, Tanaka
|
論文抄録 |
|
|
内容記述タイプ |
Other |
|
内容記述 |
There is no unique way to encode a quantum algorithm into a quantum circuit. With limited qubit counts, connectivities, and coherence times, circuit optimization is essential to make the best use of near-term quantum devices. We introduce two separate ideas for circuit optimization and combine them in a multi-tiered quantum circuit optimization protocol called AQCEL. The first ingredient is a technique to recognize repeated patterns of quantum gates, opening up the possibility of future hardware co-optimization. The second ingredient is an approach to reduce circuit complexity by identifying zero- or low-amplitude computational basis states and redundant gates. As a demonstration, AQCEL is deployed on an iterative and efficient quantum algorithm designed to model final state radiation in high energy physics. For this algorithm, our optimization scheme brings a significant reduction in the gate count without losing any accuracy compared to the original circuit. Additionally, we have investigated whether this can be demonstrated on a quantum computer using polynomial resources. Our technique is generic and can be useful for a wide variety of quantum algorithms. |
論文抄録(英) |
|
|
内容記述タイプ |
Other |
|
内容記述 |
There is no unique way to encode a quantum algorithm into a quantum circuit. With limited qubit counts, connectivities, and coherence times, circuit optimization is essential to make the best use of near-term quantum devices. We introduce two separate ideas for circuit optimization and combine them in a multi-tiered quantum circuit optimization protocol called AQCEL. The first ingredient is a technique to recognize repeated patterns of quantum gates, opening up the possibility of future hardware co-optimization. The second ingredient is an approach to reduce circuit complexity by identifying zero- or low-amplitude computational basis states and redundant gates. As a demonstration, AQCEL is deployed on an iterative and efficient quantum algorithm designed to model final state radiation in high energy physics. For this algorithm, our optimization scheme brings a significant reduction in the gate count without losing any accuracy compared to the original circuit. Additionally, we have investigated whether this can be demonstrated on a quantum computer using polynomial resources. Our technique is generic and can be useful for a wide variety of quantum algorithms. |
書誌レコードID |
|
|
収録物識別子タイプ |
NCID |
|
収録物識別子 |
AA12894105 |
書誌情報 |
研究報告量子ソフトウェア(QS)
巻 2021-QS-2,
号 14,
p. 1-11,
発行日 2021-03-22
|
ISSN |
|
|
収録物識別子タイプ |
ISSN |
|
収録物識別子 |
2435-6492 |
Notice |
|
|
|
SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc. |
出版者 |
|
|
言語 |
ja |
|
出版者 |
情報処理学会 |