Accurate Contention-aware Scheduling Method on Clustered Many-core Platform

• Item type: Journal(1)
• 公開日: 2021-03-15
• タイトル: Accurate Contention-aware Scheduling Method on Clustered Many-core Platform
• タイトル / 言語: en
• タイトル: Accurate Contention-aware Scheduling Method on Clustered Many-core Platform
• 言語: eng
• キーワード / 主題Scheme: Other
• キーワード / 主題: [特集：組込みシステム工学] real-time scheduling, many-core, communication contention, directed acyclic graph, integer linear programming
• 資源タイプ / 資源タイプ識別子: http://purl.org/coar/resource_type/c_6501
• 資源タイプ: journal article
• 著者所属: Graduate School of Science and Engineering, Saitama University
• 著者所属: Faculty of Science and Engineering, Chuo University／JST, PRESTO／RIKEN AIP
• 著者所属: Graduate School of Science and Engineering, Saitama University／JST, PRESTO
• 著者所属(英): en
• 著者所属(英): Graduate School of Science and Engineering, Saitama University
• 著者所属(英): en
• 著者所属(英): Faculty of Science and Engineering, Chuo University / JST, PRESTO / RIKEN AIP
• 著者所属(英): en
• 著者所属(英): Graduate School of Science and Engineering, Saitama University / JST, PRESTO
• 著者名: Shingo, Igarashi; Takuro, Fukunaga; Takuya, Azumi
• 著者名(英): Shingo, Igarashi; Takuro, Fukunaga; Takuya, Azumi
• 論文抄録 / 内容記述タイプ: Other
• 論文抄録 / 内容記述: Embedded systems such as self-driving systems require a computing platform with high computing power and low power consumption. Multi-/many-core platforms definitely meet these requirements. However, for hard real-time applications, multiple demands on shared resources can hinder real-time performance. Memory is one of the resources that can most dramatically impair desired performance. Therefore, we addressed contentions induced by shared memory. The ability to predict contentions that may occur during memory access helps to reduce them. We improved the predictability of contentions by dividing tasks into the memory access phase and the execution phase using a Directed Acyclic Graph (DAG). Existing methods can make accurate contention estimations for one Compute Cluster (CC) of a clustered many-core processor. Our method is able to perform accurate contention estimations for multiple CCs, thereby doubling the scalability when contentions are taken into account. Using an Integer Linear Programming (ILP) formulation, we produced a static, non-preemptive, partitioned, and time-triggered schedule. We also conducted an experiment in order to minimize the makespan. The evaluation confirmed that our new method reduced the makespan by increasing the number of CCs.; ------------------------------; This is a preprint of an article intended for publication Journal of; Information Processing(JIP). This preprint should not be cited. This; article should be cited as: Journal of Information Processing Vol.29(2021) (online); DOI http://dx.doi.org/10.2197/ipsjjip.29.216; ------------------------------
• 論文抄録(英) / 内容記述タイプ: Other
• 論文抄録(英) / 内容記述: Embedded systems such as self-driving systems require a computing platform with high computing power and low power consumption. Multi-/many-core platforms definitely meet these requirements. However, for hard real-time applications, multiple demands on shared resources can hinder real-time performance. Memory is one of the resources that can most dramatically impair desired performance. Therefore, we addressed contentions induced by shared memory. The ability to predict contentions that may occur during memory access helps to reduce them. We improved the predictability of contentions by dividing tasks into the memory access phase and the execution phase using a Directed Acyclic Graph (DAG). Existing methods can make accurate contention estimations for one Compute Cluster (CC) of a clustered many-core processor. Our method is able to perform accurate contention estimations for multiple CCs, thereby doubling the scalability when contentions are taken into account. Using an Integer Linear Programming (ILP) formulation, we produced a static, non-preemptive, partitioned, and time-triggered schedule. We also conducted an experiment in order to minimize the makespan. The evaluation confirmed that our new method reduced the makespan by increasing the number of CCs.; ------------------------------; This is a preprint of an article intended for publication Journal of; Information Processing(JIP). This preprint should not be cited. This; article should be cited as: Journal of Information Processing Vol.29(2021) (online); DOI http://dx.doi.org/10.2197/ipsjjip.29.216; ------------------------------
• 書誌レコードID / 収録物識別子タイプ: NCID
• 書誌レコードID / 収録物識別子: AN00116647
• 書誌情報: 情報処理学会論文誌; 巻 62, 号 3, 発行日 2021-03-15
• ISSN / 収録物識別子タイプ: ISSN
• ISSN / 収録物識別子: 1882-7764