{"created":"2025-01-19T01:11:33.735783+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00210332","sets":["6164:6165:9654:10560"]},"path":["10560"],"owner":"44499","recid":"210332","title":["A study of FPGA-based real-time action estimation with multiple accelerometers"],"pubdate":{"attribute_name":"公開日","attribute_value":"2021-03-15"},"_buckets":{"deposit":"77309036-bed1-4f66-a42f-447f95ca7600"},"_deposit":{"id":"210332","pid":{"type":"depid","value":"210332","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"A study of FPGA-based real-time action estimation with multiple accelerometers","author_link":["532216","532222","532220","532217","532223","532221","532219","532218"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"A study of FPGA-based real-time action estimation with multiple accelerometers"},{"subitem_title":"A study of FPGA-based real-time action estimation with multiple accelerometers","subitem_title_language":"en"}]},"item_type_id":"18","publish_date":"2021-03-15","item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_18_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Systems and Information Engineering, University of Tsukuba"},{"subitem_text_value":"Graduate School of Science and Technology, University of Tsukuba"},{"subitem_text_value":"Graduate School of Science and Technology, University of Tsukuba"},{"subitem_text_value":"Faculty of Engineering, Information and Systems, University of Tsukuba"}]},"item_18_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Systems and Information Engineering, University of Tsukuba","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Science and Technology, University of Tsukuba","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Science and Technology, University of Tsukuba","subitem_text_language":"en"},{"subitem_text_value":"Faculty of Engineering, Information and Systems, University of Tsukuba","subitem_text_language":"en"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/210332/files/IPSJ-APRIS2020016.pdf","label":"IPSJ-APRIS2020016.pdf"},"date":[{"dateType":"Available","dateValue":"2021-03-15"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-APRIS2020016.pdf","filesize":[{"value":"1.5 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"5"},{"tax":["include_tax"],"price":"0","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"42"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"a103e2db-4565-49a9-aadd-295b609b981e","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2021 by the Information Processing Society of Japan"}]},"item_18_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Xin, Du"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Yutaka, Shinkai"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Mizuki, Itoh"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Yoshiki, Yamaguchi"}],"nameIdentifiers":[{}]}]},"item_18_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Xin, Du","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Yutaka, Shinkai","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Mizuki, Itoh","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Yoshiki, Yamaguchi","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_5794","resourcetype":"conference paper"}]},"item_18_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"This study proposes an approach to estimate human action in real-time by analyzing sensing data from multiple accelerometers with FPGA. The body action distinguished by sensing data is estimated by a neural network called a self-organizing map (SOM). It produces a low-dimensional representation of data sensed by multiple accelerometers using unsupervised learning. It can visualize them in the learning space automatically and classify humans' actions with high accuracy. However, the iterated computation on SOM requires many computational efforts, which requires choosing efficient computational chips. In this study, FPGA was chosen to develop a computational technique because the spatial parallelism on FPGAs is useful to implement SOM parallelism. In our experiments, the trial system comprises one Xilinx Spartan-6 FPGA, a small FPGA, and five multiple 9-axis sensors. Although it was small and straightforward, it could distinguish five actions: walk, run, stand, stair-up, and stair-down.","subitem_description_type":"Other"}]},"item_18_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"This study proposes an approach to estimate human action in real-time by analyzing sensing data from multiple accelerometers with FPGA. The body action distinguished by sensing data is estimated by a neural network called a self-organizing map (SOM). It produces a low-dimensional representation of data sensed by multiple accelerometers using unsupervised learning. It can visualize them in the learning space automatically and classify humans' actions with high accuracy. However, the iterated computation on SOM requires many computational efforts, which requires choosing efficient computational chips. In this study, FPGA was chosen to develop a computational technique because the spatial parallelism on FPGAs is useful to implement SOM parallelism. In our experiments, the trial system comprises one Xilinx Spartan-6 FPGA, a small FPGA, and five multiple 9-axis sensors. Although it was small and straightforward, it could distinguish five actions: walk, run, stand, stair-up, and stair-down.","subitem_description_type":"Other"}]},"item_18_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"72","bibliographic_titles":[{"bibliographic_title":"Proceedings of Asia Pacific Conference on Robot IoT System Development and Platform"}],"bibliographicPageStart":"71","bibliographicIssueDates":{"bibliographicIssueDate":"2021-03-15","bibliographicIssueDateType":"Issued"},"bibliographicVolumeNumber":"2020"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"id":210332,"updated":"2025-01-19T18:11:42.108980+00:00","links":{}}