@inproceedings{oai:ipsj.ixsq.nii.ac.jp:00210318,
 author = {Ryota, Yamamoto and Masataka, Ogawa and Masahiro, Oinuma and Masaki, Kondo and Shinya, Honda and Masato, Edahiro and Ryota, Yamamoto and Masataka, Ogawa and Masahiro, Oinuma and Masaki, Kondo and Shinya, Honda and Masato, Edahiro},
 book = {Proceedings of Asia Pacific Conference on Robot IoT System Development and Platform},
 month = {Mar},
 note = {This paper presents an integrated development environment, HS-MBP, to generate parallelized code and executables for MPSoC with FPGA, named Field-Programmable Heterogeneous SoC (FP-HSoC), in model-based development. In our environment, we propose an automatic code generation for communication mechanism between sub-models with different control periods. Using this mechanism, our environment is capable of executable generation from multirate models, which are hard to design when multirate systems like robot IoT are constructed on FP-HSoC. Our environment has been applied to an multirate model as a case study. The results show that HS-MBP successfully generated parallelized codes of multirate systems for several patterns of block assignment to FP-HSoC. With the results of the case study, we discuss workflow for model-based parallelization of multirate models on FP-HSoC and future work., This paper presents an integrated development environment, HS-MBP, to generate parallelized code and executables for MPSoC with FPGA, named Field-Programmable Heterogeneous SoC (FP-HSoC), in model-based development. In our environment, we propose an automatic code generation for communication mechanism between sub-models with different control periods. Using this mechanism, our environment is capable of executable generation from multirate models, which are hard to design when multirate systems like robot IoT are constructed on FP-HSoC. Our environment has been applied to an multirate model as a case study. The results show that HS-MBP successfully generated parallelized codes of multirate systems for several patterns of block assignment to FP-HSoC. With the results of the case study, we discuss workflow for model-based parallelization of multirate models on FP-HSoC and future work.},
 pages = {6--13},
 publisher = {情報処理学会},
 title = {Multirate Model Parallelization for MPSoC with FPGA in Model-Based Development: A Case Study},
 volume = {2020},
 year = {2021}
}