{"links":{},"id":209238,"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00209238","sets":["1164:1579:10482:10483"]},"path":["10483"],"owner":"44499","recid":"209238","title":["ESSPER: 高性能計算のためのスケーラブルかつ柔軟なFPGAクラスタシステムの開発"],"pubdate":{"attribute_name":"公開日","attribute_value":"2021-01-18"},"_buckets":{"deposit":"a3e97db3-9424-4723-8f93-12b83f0bc64f"},"_deposit":{"id":"209238","pid":{"type":"depid","value":"209238","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"ESSPER: 高性能計算のためのスケーラブルかつ柔軟なFPGAクラスタシステムの開発","author_link":["526882","526887","526885","526880","526883","526888","526886","526881","526884","526879"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"ESSPER: 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R-CCS","subitem_text_language":"en"},{"subitem_text_value":"Processor Research Team, RIKEN R-CCS","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/209238/files/IPSJ-ARC21243002.pdf","label":"IPSJ-ARC21243002.pdf"},"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC21243002.pdf","filesize":[{"value":"3.1 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篤史"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Kentaro, Sano","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Tomohiro, Ueno","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Takaaki, Miyajia","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Jens, Huthmann","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Atsushi, Koshiba","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8574","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"本研究では，既存システムの拡張を容易に行え，かつ台数効果の高い FPGA システムの実現を目指し，高性能計算のためのスケーラブルかつ柔軟な FPGA クラスタ試作システム ESSPER を開発している．本稿では，その要件，システム構成およびソフトウェアスタック，プログラミング方法，および動作検証とデータ転送性能について述べる．   ","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システム・アーキテクチャ（ARC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2021-01-18","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"2","bibliographicVolumeNumber":"2021-ARC-243"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"created":"2025-01-19T01:10:33.741835+00:00","updated":"2025-01-19T18:34:51.933340+00:00"}