{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00203215","sets":["1164:1579:10069:10141"]},"path":["10141"],"owner":"44499","recid":"203215","title":["SMT Processor におけるリアルタイム処理用CPU資源予約機構"],"pubdate":{"attribute_name":"公開日","attribute_value":"2020-02-20"},"_buckets":{"deposit":"846dde69-3ed7-414c-a1b4-54d6e1dbc7ad"},"_deposit":{"id":"203215","pid":{"type":"depid","value":"203215","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"SMT Processor におけるリアルタイム処理用CPU資源予約機構","author_link":["500278","500273","500277","500279","500274","500276","500271","500275","500270","500272"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"SMT Processor におけるリアルタイム処理用CPU資源予約機構"},{"subitem_title":"A Resource Reservation Unit for Real-Time for SMT Processors","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"回路とアーキテクチャ","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2020-02-20","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"慶應義塾大学理工学部"},{"subitem_text_value":"慶應義塾大学大学院理工学研究科"},{"subitem_text_value":"慶應義塾大学大学院理工学研究科"},{"subitem_text_value":"慶應義塾大学大学院理工学研究科"},{"subitem_text_value":"慶應義塾大学理工学部"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Faculty of Science and Technology, Keio University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Science and Technology, Keio University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Science and Technology, Keio University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Science and Technology, Keio University","subitem_text_language":"en"},{"subitem_text_value":"Faculty of Science and Technology, Keio University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/203215/files/IPSJ-ARC20240030.pdf","label":"IPSJ-ARC20240030.pdf"},"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC20240030.pdf","filesize":[{"value":"1.2 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_login","version_id":"2bd3fb3f-9df6-4a70-9c77-64e8377b10fd","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2020 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"山藤, 篤志"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"高橋, 真彦"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"井出, 陽介"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"杉山, 尚央"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"山崎, 信行"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Atsushi, Santo","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Masahiko, Takahashi","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Yosuke, Ide","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Nao, Sugiyama","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Nobuyuki, Yamasaki","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8574","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"組込みシステムに用いられるプロセッサでは，面積，消費電力，リアルタイム性など多くの制約がある．リアルタイム性とは時間制約を守って処理を行う性質のことである．組込みシステムではスケジューリングを行うことでリアルタイム性を保証する．マルチプロセッサにおけるスケジューリング方式の一つにパーティションスケジューリングがある．パーティショニングスケジューリングには任意のタスクセットにおいて各プロセッサを 100 使用することができないという課題がある．スレッドレベル並列性を抽出する SMT (Simultaneous MultiThreading) は，システムのトータルスループットを向上し，面積あたりの性能を高めることができる．このためリアルタイムシステムに対し有効である．本研究では SMT プロセッサにおいて各スレッドに割り当てる資源をハードウェアで変更するための CPU 資源予約機構を提案する．この CPU 資源予約機構を優先度付き SMT プロセッサである RMTP (Responsive MultiThreaded Processor) 上に実装した．RTL シミュレーションで評価を行なったところ，ソフトウェアで設定した割合に応じてハードウェア資源によって各スレッドに割り当てる資源の割合を制御可能であることを確認した．","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システム・アーキテクチャ（ARC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2020-02-20","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"30","bibliographicVolumeNumber":"2020-ARC-240"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"id":203215,"updated":"2025-01-19T20:37:48.725099+00:00","links":{},"created":"2025-01-19T01:05:39.271378+00:00"}