{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00202632","sets":["1164:1579:10069:10070"]},"path":["10070"],"owner":"44499","recid":"202632","title":["ベクトルプロセッサからFPGAへのタスクオフロードに関する一考察"],"pubdate":{"attribute_name":"公開日","attribute_value":"2020-01-15"},"_buckets":{"deposit":"16854f96-e39e-4e91-b8f7-f09e7aef0c77"},"_deposit":{"id":"202632","pid":{"type":"depid","value":"202632","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"ベクトルプロセッサからFPGAへのタスクオフロードに関する一考察","author_link":["497620","497619","497618","497616","497617"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"ベクトルプロセッサからFPGAへのタスクオフロードに関する一考察"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"アプリケーション","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2020-01-15","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"東北大学大学院情報科学研究科"},{"subitem_text_value":"理化学研究所計算科学研究センター"},{"subitem_text_value":"東北大学大学院情報科学研究科"},{"subitem_text_value":"東北大学大学院情報科学研究科"},{"subitem_text_value":"理化学研究所計算科学研究センター"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/202632/files/IPSJ-ARC20239002.pdf","label":"IPSJ-ARC20239002.pdf"},"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC20239002.pdf","filesize":[{"value":"1.6 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_login","version_id":"93d40d0f-13f3-449e-9b9d-871badf182dc","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2020 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"土方, 康平"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"上野, 知洋"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"江川, 隆輔"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"滝沢, 寛之"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"佐野, 健太郎"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8574","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"本論文は，ベクトル計算機である NEC SX-Aurora TSUBASA (SX-AT) に搭載されるベクトルプロセッサ，Vector Engine (VE) が苦手とする計算処理を FPGA にオフロードし，それによって期待される性能向上を定量的に議論する．SX-AT には VE が Peripheral Component Interconnect Express (PCIe) カード上に搭載されている．本論文では，SX-AT に FPGA ボードを搭載することで，PCIe を介した VE と FPGA の連携機構を構築する．VE の PCI デバイス専用 API と FPGA 上に実装した Direct Memory Access (DMA) モジュールを用いて，VE と FPGA のメモリにおけるデータの転送を実現する．測定したデータ転送の遅延と帯域に基づき，VE から FPGA へのタスクオフロードの可能性を考察する．本稿においては，タスクの一例としてデータの圧縮処理を FPGA にオフロードすることを考え，VE ノードの実質的な帯域の向上という観点から，タスクオフロードの有用性を議論する．","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"5","bibliographic_titles":[{"bibliographic_title":"研究報告システム・アーキテクチャ（ARC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2020-01-15","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"2","bibliographicVolumeNumber":"2020-ARC-239"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"id":202632,"updated":"2025-01-19T20:49:07.530709+00:00","links":{},"created":"2025-01-19T01:05:11.241092+00:00"}