{"created":"2025-05-26T04:57:02.305564+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:02002245","sets":["1164:1579:11896:1748234218909"]},"path":["1748234218909"],"owner":"80578","recid":"2002245","title":["トランザクショナルメモリにおける競合抑制のためのトランザクションカラーリングとその最適化"],"pubdate":{"attribute_name":"PubDate","attribute_value":"2025-06-02"},"_buckets":{"deposit":"49951ef9-541d-43fb-9977-d64ab281730c"},"_deposit":{"id":"2002245","pid":{"type":"depid","value":"2002245","revision_id":0},"owners":[80578],"status":"published","created_by":80578},"item_title":"トランザクショナルメモリにおける競合抑制のためのトランザクションカラーリングとその最適化","author_link":[],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"トランザクショナルメモリにおける競合抑制のためのトランザクションカラーリングとその最適化","subitem_title_language":"ja"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"並列処理","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2025-06-02","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"名古屋工業大学"},{"subitem_text_value":"名古屋工業大学"},{"subitem_text_value":"名古屋工業大学"},{"subitem_text_value":"名古屋工業大学"},{"subitem_text_value":"名古屋工業大学"},{"subitem_text_value":"名古屋工業大学"},{"subitem_text_value":"東京大学"},{"subitem_text_value":"国立情報学研究所"},{"subitem_text_value":"名古屋工業大学"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Nagoya Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Nagoya Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Nagoya Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Nagoya Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Nagoya Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Nagoya Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"The University of Tokyo","subitem_text_language":"en"},{"subitem_text_value":"National Institute of Informatics","subitem_text_language":"en"},{"subitem_text_value":"Nagoya Institute of Technology","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/2002245/files/IPSJ-ARC25261009.pdf","label":"IPSJ-ARC25261009.pdf"},"date":[{"dateType":"Available","dateValue":"2027-06-02"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC25261009.pdf","filesize":[{"value":"1.4 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"adc31b15-e2ec-48a6-9f8b-e27aac4212d8","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2025 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"藤井,創悟"}]},{"creatorNames":[{"creatorName":"岩越,智貴"}]},{"creatorNames":[{"creatorName":"佐藤,宏樹"}]},{"creatorNames":[{"creatorName":"伊原,槻"}]},{"creatorNames":[{"creatorName":"酒井,駿輔"}]},{"creatorNames":[{"creatorName":"小泉,透"}]},{"creatorNames":[{"creatorName":"塩谷,亮太"}]},{"creatorNames":[{"creatorName":"五島,正裕"}]},{"creatorNames":[{"creatorName":"津邑,公暁"}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8574","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"ロックを補完・代替する並列性制御機構としてトランザクショナルメモリ（TM）が提案されている．一般的なTMは，再競合の可能性が高いにもかかわらず，アボート時に同一のトランザクションを再実行するため，競合が繰り返し発生してしまう．先行研究では，実行スレッドの切替えにより，異なるスレッドが担当するトランザクションに実行を切り替えることで，この競合の連続発生を抑制する手法が提案されているが，コア内のスレッドをラウンドロビンに切り替えているにすぎず，各スレッドが擁するトランザクションの競合のしやすさなどは考慮されていなかった．そこで本稿では，プログラマがトランザクションの競合のしやすさを示すヒント情報を提示可能なインタフェースを定義し，システムがその情報をスケジューリングに活用することで，より効果的に競合の繰り返しを回避する，トランザクションカラーリングを提案する．また，競合を最も効果的に抑制できるカラーリング方法についても併せて検討する．","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"10","bibliographic_titles":[{"bibliographic_title":"研究報告システム・アーキテクチャ（ARC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2025-06-02","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"9","bibliographicVolumeNumber":"2025-ARC-261"}]},"relation_version_is_last":true,"weko_creator_id":"80578"},"id":2002245,"updated":"2025-05-26T04:57:06.461197+00:00","links":{}}