{"links":{},"id":2001085,"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:02001085","sets":["1164:1579:11896:1740630607221"]},"path":["1740630607221"],"owner":"80578","recid":"2001085","title":["FPGA向け高スループット算術符号化アーキテクチャ"],"pubdate":{"attribute_name":"PubDate","attribute_value":"2025-03-10"},"_buckets":{"deposit":"b73a8cf9-f03a-4c33-a3ab-d5a7044067ba"},"_deposit":{"id":"2001085","pid":{"type":"depid","value":"2001085","revision_id":0},"owners":[80578],"status":"published","created_by":80578},"item_title":"FPGA向け高スループット算術符号化アーキテクチャ","author_link":[],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"FPGA向け高スループット算術符号化アーキテクチャ","subitem_title_language":"ja"},{"subitem_title":"A High-Throughput Architecture of Arithmetic Coder for FPGAs","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"アクセラレータ","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2025-03-10","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"東京農工大学"},{"subitem_text_value":"東京農工大学"},{"subitem_text_value":"東京農工大学／現在，東北大学"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/2001085/files/IPSJ-ARC25260034.pdf","label":"IPSJ-ARC25260034.pdf"},"date":[{"dateType":"Available","dateValue":"2027-03-10"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC25260034.pdf","filesize":[{"value":"1.2 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"dac38a0c-ad89-44d1-9f56-47e06a975443","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2025 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"青木,雅史"}]},{"creatorNames":[{"creatorName":"丹羽,直也"}]},{"creatorNames":[{"creatorName":"岩崎,裕江"}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8574","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"高解像度化が進む映像データを効率的に伝送・保存するためには、映像符号化アルゴリズムの高速化が必要である。映像符号化では、最終段階のデータ圧縮に二値算術符号化（Binary Arithmetic Coding:  BAC)が用いられる。BACは、処理の依存関係のために単純な並列化が困難であり、専用回路の高スループット化に課題がある。本研究では、BACの処理順序を可変にするアウトオブオーダー方式を提案する。提案アーキテクチャは、FPGAの固定回路であるメモリブロックを高スループット化のために利用できる。提案手法は既存手法から23.9%のスループット向上を達成し、16K 120Hzの符号化に十分な性能を実現した。","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システム・アーキテクチャ（ARC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2025-03-10","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"34","bibliographicVolumeNumber":"2025-ARC-260"}]},"relation_version_is_last":true,"weko_creator_id":"80578"},"created":"2025-02-27T04:47:20.116553+00:00","updated":"2025-02-27T06:31:08.006595+00:00"}