{"id":197528,"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00197528","sets":["1164:1579:9681:9819"]},"path":["9819"],"owner":"44499","recid":"197528","title":["オープンソースなマルチポートメモリコンパイラの検討"],"pubdate":{"attribute_name":"公開日","attribute_value":"2019-06-04"},"_buckets":{"deposit":"ab75e838-aea4-4d19-b3d7-bd46079ccb4c"},"_deposit":{"id":"197528","pid":{"type":"depid","value":"197528","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"オープンソースなマルチポートメモリコンパイラの検討","author_link":["473989","473988","473985","473984","473987","473986"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"オープンソースなマルチポートメモリコンパイラの検討"},{"subitem_title":"A Study of an Open-Source Memory Compiler for a Multi-Port Memory","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"メモリシステム","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2019-06-04","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"東京大学大学院情報理工学系研究科"},{"subitem_text_value":"東京大学大学院情報理工学系研究科"},{"subitem_text_value":"東京大学大学院情報理工学系研究科"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Information Science and Technology, The University of Tokyo","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Information Science and Technology, The University of Tokyo","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Information Science and Technology, The University of Tokyo","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/197528/files/IPSJ-ARC19236022.pdf","label":"IPSJ-ARC19236022.pdf"},"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC19236022.pdf","filesize":[{"value":"364.8 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_login","version_id":"f6d93b85-0819-4894-9bb7-a451663bf85f","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2019 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"門本, 淳一郎"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"入江, 英嗣"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"坂井, 修一"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Junichiro, Kadomoto","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Hidetsugu, Irie","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Shuichi, Sakai","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8574","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"複数の書き込み ・ 読み出しポートを持ったマルチポートメモリは，プロセッサのレジスタファイルをはじめとして種々のデジタル回路に搭載される．しかしながら，多くの PDK においてマルチポートメモリは用意されおらず，こうした回路の設計者は商用ハードマクロ IP を用いるか膨大な設計時間を費やして新規設計をおこなうことになっている．そこで本論文では，マルチポートメモリを自動生成するメモリコンパイラの設計について検討する．異なるプロセスへの汎用的な対応のためのセルベースドなレイアウトや読み書き安定性の高い SRAM セル構成，オープンソースでの公開に向けた容易に導入可能なソフトウェア構成について述べる．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"Multi-port memories with multiple write/read ports are implemented in many digital circuits, including register files of processors. However, many PDKs lack multi-port memory, and designers of such circuits use commercial hard macro IP or spend a lot of design time to make new designs. In this paper, we consider the design of multi-port memory compiler. We describe cell-based layout and SRAM cell configuration with high reading/writing stability for adapting to various technology nodes, and easily installable software configuration for open-source publishing.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"4","bibliographic_titles":[{"bibliographic_title":"研究報告システム・アーキテクチャ（ARC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2019-06-04","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"22","bibliographicVolumeNumber":"2019-ARC-236"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"updated":"2025-01-19T22:18:47.094744+00:00","created":"2025-01-19T01:01:58.915382+00:00","links":{}}