{"id":197509,"updated":"2025-01-19T22:19:13.853968+00:00","links":{},"created":"2025-01-19T01:01:57.827479+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00197509","sets":["1164:1579:9681:9819"]},"path":["9819"],"owner":"44499","recid":"197509","title":["データ圧縮に基づくGPU向け高性能キャッシュアーキテクチャの提案"],"pubdate":{"attribute_name":"公開日","attribute_value":"2019-06-04"},"_buckets":{"deposit":"1e13818c-b246-45d3-b98e-2da95ba0050b"},"_deposit":{"id":"197509","pid":{"type":"depid","value":"197509","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"データ圧縮に基づくGPU向け高性能キャッシュアーキテクチャの提案","author_link":["473877","473876","473878","473875","473879"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"データ圧縮に基づくGPU向け高性能キャッシュアーキテクチャの提案"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"GPUシステム","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2019-06-04","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"株式会社ソシオネクスト"},{"subitem_text_value":"九州大学大学院システム情報科学研究院I&Eビジョナリー特別部門"},{"subitem_text_value":"九州大学情報基盤研究開発センター学習環境デザイン研究部門"},{"subitem_text_value":"九州大学大学院システム情報科学研究院情報知能工学部門"},{"subitem_text_value":"九州大学大学院システム情報科学研究院情報知能工学部門"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/197509/files/IPSJ-ARC19236003.pdf","label":"IPSJ-ARC19236003.pdf"},"date":[{"dateType":"Available","dateValue":"2021-06-04"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC19236003.pdf","filesize":[{"value":"2.7 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"38135638-a5f6-48ad-a1a6-ad755a445a59","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2019 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"岡, 慶太郎"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"川上, 哲志"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"谷本, 輝夫"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"小野, 貴継"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"井上, 弘士"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8574","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"Graphic Processsing Unit （GPU） は多数のプロセッサコアによる並列処理により高性能を達成する．一方で，GPU は多数のプロセッサコアが少量の L1 キャッシュを共有するため，プログラムによっては競合性ミスが頻発する．この問題へのアプローチの一つとして面積を増加させることなくキャッシュの実効容量を増加させるデータ圧縮に基づくキャッシュメモリが挙げられる．しかしながら，既存手法はキャッシュライン圧縮効果が低い場合がある点や復元レイテンシが長くなりやすいため，GPU における性能向上が十分でない．そこで，本研究はまず，同一の静的命令が参照するキャッシュライン間ではデータ値の局所性が高い場合があるという性質を利用して，既存手法の圧縮効果を改善する．つぎに，我々は復元時に不必要なデータへのアクセスを抑制することで，復元レイテンシを削減する手法を提案する．評価の結果，全ての提案手法を包括的に適用した場合に従来型キャッシュに対して，平均 8.7 ポイントの性能向上を達成した．また，アプリケーションごとに適切な手法を選択する場合では従来型キャッシュと比較して平均 14.2 ポイントの性能向上を達成する可能性があることが明らかになった．","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"9","bibliographic_titles":[{"bibliographic_title":"研究報告システム・アーキテクチャ（ARC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2019-06-04","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"3","bibliographicVolumeNumber":"2019-ARC-236"}]},"relation_version_is_last":true,"weko_creator_id":"44499"}}