{"created":"2025-01-19T00:59:48.856855+00:00","updated":"2025-01-19T23:20:57.725813+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00194782","sets":["1164:2240:9748:9749"]},"path":["9749"],"owner":"44499","recid":"194782","title":["FPGAへのオフロード最適化のためのSPGenとOpenCLの統合の検討"],"pubdate":{"attribute_name":"公開日","attribute_value":"2019-02-26"},"_buckets":{"deposit":"fa072323-2171-4520-b4f8-02ae309c03a3"},"_deposit":{"id":"194782","pid":{"type":"depid","value":"194782","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"FPGAへのオフロード最適化のためのSPGenとOpenCLの統合の検討","author_link":["461894","461892","461890","461891","461893"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"FPGAへのオフロード最適化のためのSPGenとOpenCLの統合の検討"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"FPGA","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2019-02-26","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"筑波大学システム情報工学研究科"},{"subitem_text_value":"理化学研究所計算科学研究センター"},{"subitem_text_value":"理化学研究所計算科学研究センター"},{"subitem_text_value":"筑波大学計算科学研究センター／筑波大学システム情報工学研究科"},{"subitem_text_value":"理化学研究所計算科学研究センター／筑波大学システム情報工学研究科"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/194782/files/IPSJ-HPC19168011.pdf","label":"IPSJ-HPC19168011.pdf"},"date":[{"dateType":"Available","dateValue":"2021-02-26"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-HPC19168011.pdf","filesize":[{"value":"964.1 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"14"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"18adb88e-c0a7-4a9a-af02-dc7dea0e60df","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2019 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"渡部, 裕"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"李, 珍泌"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"佐野, 健太郎"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"朴, 泰祐"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"佐藤, 三久"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10463942","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8841","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"高性能計算向け FPGA (Field-Programmable Gate Arrays) 利用が注目を集めている．FPGA とは書き換え可能なハードウェアであり，計算に特化した効率的な回路を生成可能である．高性能計算で FPGA を使用するための問題の 1 つはどのようにして必要な回路を記述するかである．従来の HDL (Hardware Description Language) を用いた複雑な回路設計を緩和するために導入された高位合成も依然として複雑であり，さらなる改善が必要とされる．本研究では OpenMP プログラミングモデルを用いることを想定し，OpenMP により指定された部分を OpenCL を用いて FPGA にオフロードする．本稿では，FPGA の回路を記述するための言語としてストリーム計算用フレームワークである SPGen に注目し，FPGA へのオフロードされた OpenCL の一部を SPGen を用いて最適化することを提案する．ラプラス方程式を用いた評価では，OpenCL のみを使用し，ディレクティブによる最適化を行う場合に対し本手法は高い演算性能を示した．また，今後 OpenCL と SPGen に変換を行う OpenMP コンパイラを実装することで OpenCL の最適化の可能性を示した．","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"10","bibliographic_titles":[{"bibliographic_title":"研究報告ハイパフォーマンスコンピューティング（HPC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2019-02-26","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"11","bibliographicVolumeNumber":"2019-HPC-168"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"id":194782,"links":{}}