{"updated":"2025-01-19T23:40:36.496141+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00194209","sets":["1164:2036:9683:9686"]},"path":["9686"],"owner":"44499","recid":"194209","title":["雑音畳込みニューラルネットワークとそのFPGA実装について"],"pubdate":{"attribute_name":"公開日","attribute_value":"2019-01-23"},"_buckets":{"deposit":"fafd9fdf-eead-41bb-a3f3-bf88084eaa6e"},"_deposit":{"id":"194209","pid":{"type":"depid","value":"194209","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"雑音畳込みニューラルネットワークとそのFPGA実装について","author_link":["457280","457281","457283","457279","457282","457278"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"雑音畳込みニューラルネットワークとそのFPGA実装について"},{"subitem_title":"A CNN with a Noise Addition for Efficient Implementation on an FPGA","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"回路とシステム","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2019-01-23","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"東京工業大学工学部情報工学科"},{"subitem_text_value":"東京工業大学工学部情報工学科"},{"subitem_text_value":"東京工業大学工学院情報通信系"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Department of Computer Science, School of Engineering, Tokyo Institute of Technology,","subitem_text_language":"en"},{"subitem_text_value":"Department of Information and Communications Engineering, School of Engineering, Tokyo Institute of Technology,","subitem_text_language":"en"},{"subitem_text_value":"Department of Information and Communications Engineering, School of Engineering, Tokyo Institute of Technology,","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/194209/files/IPSJ-SLDM19186004.pdf","label":"IPSJ-SLDM19186004.pdf"},"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM19186004.pdf","filesize":[{"value":"1.7 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_login","version_id":"dac95569-81d5-4860-9db5-82d14e0ea0ed","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2019 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"宗形, 敦樹"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"佐藤, 真平"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"中原, 啓貴"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Atsuki, Munakata","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Shimpei, Satou","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Hiroki, Nakahara","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8639","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"画像認識の分野で広く利用されている畳込みニューラルネットワーク (CNN : Convolutional Neural Network) は重みの数や乗算数が多いという問題がある．これらを解決するため，本論文では雑音付加と point-wise (1 x 1) 畳込みを組み合わせた雑音畳込み層を用いる．既存研究の解析から，雑音畳込み層だけでは入力データは偏っているため認識精度が低下することが判明している．本論文では，k 層までを既存の畳込み層で実現し，k ＋1 層以降を雑音畳込み層で実現する Noise Convolutional Neural Network (NCNN) を提案する．これにより，大部分の畳込み層を 1 x 1 畳込み層に換えることで重みの数と乗算数を削減しつつ，雑音を加えることで認識精度劣化を抑えることができる．NCNN と既存 CNN の認識精度とパラメータ (重み) 量の比較を行った．CIFAR-100 データセットに関して，AlexNet ではパラメータを 88%，ResNet - 18 では 96.2% 削減できた一方，認識精度に関しては AlexNet では 2.2%，ResNet - 18 では 1.8% に抑えることができた．また，本論文では提案する NCNN を効率よく実行するアーキテクチャについて述べる．NCNN では k + 1 層以降は point-wise 畳込みのみ行われるため，複雑なメモリアクセスアーキテクチャは不要であり，単純かつ高速なアーキテクチャで実現可能である．提案 NCNN を Xilinx 社 ZCU102 FPGA 評価ボード上に実装した結果，クラス分類タスクに関しては Binary CNN と比較して同程度の速度を達成しつつ，認識精度が約 10% 優れていた．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"This article is a technical report without peer review, and its polished and / or extended version may be published elsewhere.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システムとLSIの設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2019-01-23","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"4","bibliographicVolumeNumber":"2019-SLDM-186"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"created":"2025-01-19T00:59:16.941962+00:00","id":194209,"links":{}}