{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00194178","sets":["1164:1579:9681:9685"]},"path":["9685"],"owner":"44499","recid":"194178","title":["異デバイス間でのPCIe通信を実現するOpenCL対応FPGAモジュールの提案と検証"],"pubdate":{"attribute_name":"公開日","attribute_value":"2019-01-23"},"_buckets":{"deposit":"9dd55b37-3e45-438a-a6fc-d92e04d6bc30"},"_deposit":{"id":"194178","pid":{"type":"depid","value":"194178","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"異デバイス間でのPCIe通信を実現するOpenCL対応FPGAモジュールの提案と検証","author_link":["457097","457099","457100","457095","457096","457098","457094","457093"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"異デバイス間でのPCIe通信を実現するOpenCL対応FPGAモジュールの提案と検証"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"高位設計","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2019-01-23","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"筑波大学計算科学研究センター／筑波大学システム情報工学研究科"},{"subitem_text_value":"筑波大学計算科学研究センター"},{"subitem_text_value":"筑波大学システム情報工学研究科／筑波大学計算科学研究センター"},{"subitem_text_value":"筑波大学計算科学研究センター／筑波大学システム情報工学研究科"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Center for Computational Sciences, University of Tsukuba / Graduate School of Systems and Information Engineering, University of Tsukuba","subitem_text_language":"en"},{"subitem_text_value":"Center for Computational Sciences, University of Tsukuba","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Systems and Information Engineering, University of Tsukuba / Center for Computational Sciences, University of Tsukuba","subitem_text_language":"en"},{"subitem_text_value":"Center for Computational Sciences, University of Tsukuba / Graduate School of Systems and Information Engineering, University of Tsukuba","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/194178/files/IPSJ-ARC19234019.pdf","label":"IPSJ-ARC19234019.pdf"},"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC19234019.pdf","filesize":[{"value":"2.5 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_login","version_id":"174b9370-1cf1-4a8f-9454-c7e31e284878","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2019 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"小林, 諒平"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"藤田, 典久"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"山口, 佳樹"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"朴, 泰祐"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Ryohei, Kobayashi","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Norihisa, Fujita","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Yoshiki, Yamaguchi","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Taisuke, Boku","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8574","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"我々は，高い演算性能とメモリバンド幅を有する GPU (Graphics Processing Unit) に演算通信性能に優れている FPGA (Field Programmable Gate Array) を連携させ，双方を相補的に利用する GPU-FPGA 複合システムに関する研究を進めている．GPU，FPGAといった異なるハードウェアを搭載するシステム上では，各デバイスで実行される演算をどのようにプログラミングし，全デバイスを協調動作させるかが重要な課題となる．そこで本稿では，OpenCL コードから制御可能なデバイス間データ転送について提案する．GPU デバイスメモリの PCIe アドレスマッピング結果をベースに作成されたディスクリプタを FPGA に送信し，FPGA 内の PCIe DMA コントローラに書き込むことによって，GPU デバイスのグローバルメモリと FPGA デバイスの外部メモリ間で CPU を介さずにデータ転送を実現する．通信レイテンシと通信バンド幅の観点から提案手法を評価した結果，従来手法と比較して，通信レイテンシの面では最大 33.3 倍の性能差，通信バンド幅の面では最大 2.0 倍の性能差が確認された．","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システム・アーキテクチャ（ARC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2019-01-23","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"19","bibliographicVolumeNumber":"2019-ARC-234"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"id":194178,"updated":"2025-01-19T23:40:44.885938+00:00","links":{},"created":"2025-01-19T00:59:16.492999+00:00"}