{"created":"2025-01-19T00:59:00.002006+00:00","updated":"2025-01-19T23:47:47.438210+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00193862","sets":["6164:6165:7019:9662"]},"path":["9662"],"owner":"44499","recid":"193862","title":["宇宙用途のFPGA外部インタフェース回路開発に対するモデル検査適用"],"pubdate":{"attribute_name":"公開日","attribute_value":"2019-01-17"},"_buckets":{"deposit":"2340267a-03a0-434e-bc8a-ef114d607f10"},"_deposit":{"id":"193862","pid":{"type":"depid","value":"193862","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"宇宙用途のFPGA外部インタフェース回路開発に対するモデル検査適用","author_link":["455079","455076","455074","455075","455077","455073","455078","455080"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"宇宙用途のFPGA外部インタフェース回路開発に対するモデル検査適用"},{"subitem_title":"Application of model checking to FPGA external interface circuit development for space application","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"形式手法 －実システムへの導入を成功させるために－","subitem_subject_scheme":"Other"}]},"item_type_id":"18","publish_date":"2019-01-17","item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_18_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"国立研究開発法人宇宙航空研究開発機構"},{"subitem_text_value":" 国立研究開発法人宇宙航空研究開発機構"},{"subitem_text_value":" 国立研究開発法人宇宙航空研究開発機構"},{"subitem_text_value":" 国立研究開発法人宇宙航空研究開発機構"}]},"item_18_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Japan Aerospace Exploration Agency (JAXA)","subitem_text_language":"en"},{"subitem_text_value":"Japan Aerospace Exploration Agency (JAXA)","subitem_text_language":"en"},{"subitem_text_value":"Japan Aerospace Exploration Agency (JAXA)","subitem_text_language":"en"},{"subitem_text_value":"Japan Aerospace Exploration Agency (JAXA)","subitem_text_language":"en"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/193862/files/IPSJ-WWS2019003.pdf","label":"IPSJ-WWS2019003.pdf"},"date":[{"dateType":"Available","dateValue":"2021-01-17"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-WWS2019003.pdf","filesize":[{"value":"391.9 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"12"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"5be494a9-94c0-40a0-b228-228a0e8bed08","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2019 by the Information Processing Society of Japan"}]},"item_18_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"倉林, 翔"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"梅田, 浩貴"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"石垣, 雄基"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"植田, 泰士"}],"nameIdentifiers":[{}]}]},"item_18_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Sho, Kurahayashi","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Hiroki, Umeda","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Yuuki, Ishigaki","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Yasushi, Ueda","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_5794","resourcetype":"conference paper"}]},"item_18_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"本稿では，宇宙用途の FPGA 外部インタフェース回路開発に対するモデル検査適用課題の対策を立て，その対策を基に開発したツールを示す．","subitem_description_type":"Other"}]},"item_18_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"In this paper, we set up countermeasures for model inspection application tasks for the development of FPGA external interface circuit for space application, and show the tools developed based on the countermeasure.","subitem_description_type":"Other"}]},"item_18_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"ウィンターワークショップ2019・イン・福島飯坂 論文集"}],"bibliographicPageStart":"5","bibliographicIssueDates":{"bibliographicIssueDate":"2019-01-17","bibliographicIssueDateType":"Issued"},"bibliographicVolumeNumber":"2019"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"id":193862,"links":{}}