{"id":186482,"created":"2025-01-19T00:53:26.120169+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00186482","sets":["1164:2036:9343:9430"]},"path":["9430"],"owner":"11","recid":"186482","title":["最適な並行性制御を適用するコード生成手法の検討"],"pubdate":{"attribute_name":"公開日","attribute_value":"2018-02-28"},"_buckets":{"deposit":"c110fd91-b521-49ff-acb7-30ba3f38f652"},"_deposit":{"id":"186482","pid":{"type":"depid","value":"186482","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"最適な並行性制御を適用するコード生成手法の検討","author_link":["418353","418351","418354","418349","418352","418350"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"最適な並行性制御を適用するコード生成手法の検討"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"コード生成・プログラミング言語","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2018-02-28","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"名古屋工業大学"},{"subitem_text_value":"名古屋工業大学"},{"subitem_text_value":"名古屋工業大学"},{"subitem_text_value":"名古屋大学"},{"subitem_text_value":"国立情報学研究所"},{"subitem_text_value":"名古屋工業大学"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Nagoya 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昌樹"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"二間瀬, 悠希"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"多治見, 知紀"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"塩谷, 亮太"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"五島, 正裕"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"津邑, 公暁"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8639","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"トランザクショナルメモリは，トランザクションとして定義された区間を投機的に並行実行することで，粗粒度ロックと同等以上の記述性と，細粒度ロックと同等以上の性能とを両立しうるパラダイムとして期待されている．しかし，共有変数に対するアクセス競合が頻発する場合は，必ずしも高い性能を実現し得ない．本稿では，プログラム中に定義されたトランザクションのうちのいくつかを，ロックによる制御同様，排他的に実行した場合，性能にどのような変化があるかを調査 ・ 解析する．また，ロックとトランザクショナルメモリを併用することによって発生する一貫性制御の問題を指摘し，これを解決する並行性制御手法を提案する．そして，調査で得られた知見に基づき，プログラマが定義した各トランザクションに対し，提案する並行性制御手法を適用すべきか否かを自動的に判別した上で，その判別結果に沿ったコード生成を行う手法について検討する．","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システムとLSIの設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2018-02-28","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"12","bibliographicVolumeNumber":"2018-SLDM-183"}]},"relation_version_is_last":true,"weko_creator_id":"11"},"updated":"2025-01-20T02:34:00.226051+00:00","links":{}}