{"links":{},"id":185885,"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00185885","sets":["581:9322:9324"]},"path":["9324"],"owner":"11","recid":"185885","title":["マルチコアパワートレインアプリケーションにおけるコア配置決定のための最悪応答時間解析手法"],"pubdate":{"attribute_name":"公開日","attribute_value":"2018-02-15"},"_buckets":{"deposit":"be005ca7-078d-4ce6-a403-323929722c45"},"_deposit":{"id":"185885","pid":{"type":"depid","value":"185885","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"マルチコアパワートレインアプリケーションにおけるコア配置決定のための最悪応答時間解析手法","author_link":["414811","414815","414814","414813","414816","414812"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"マルチコアパワートレインアプリケーションにおけるコア配置決定のための最悪応答時間解析手法"},{"subitem_title":"Worst Case Response Time Analysis Method for Core Allocation on Multicore Powertrain Systems","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"[特集：組込みシステム工学] 車載システム，マルチコア，最悪応答時間","subitem_subject_scheme":"Other"}]},"item_type_id":"2","publish_date":"2018-02-15","item_2_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"名古屋大学大学院情報学研究科"},{"subitem_text_value":"名古屋大学大学院情報学研究科"},{"subitem_text_value":"名古屋大学大学院情報学研究科"}]},"item_2_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Informatics, Nagoya University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Informatics, Nagoya University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Informatics, Nagoya University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/185885/files/IPSJ-JNL5902064.pdf","label":"IPSJ-JNL5902064.pdf"},"date":[{"dateType":"Available","dateValue":"2020-02-15"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-JNL5902064.pdf","filesize":[{"value":"1.2 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"8"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"4c2706f8-ff03-45e1-aee4-9254c2387b87","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2018 by the Information Processing Society of Japan"}]},"item_2_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"小川, 真彩高"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"本田, 晋也"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"高田, 広章"}],"nameIdentifiers":[{}]}]},"item_2_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Masataka, Ogawa","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Shinya, Honda","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Hiroaki, Takada","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_2_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN00116647","subitem_source_identifier_type":"NCID"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_6501","resourcetype":"journal article"}]},"item_2_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"1882-7764","subitem_source_identifier_type":"ISSN"}]},"item_2_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"近年，車載システムは高機能化が著しく，エンジン制御に用いられるパワートレイン・アプリケーション（パワトレアプリ）もマルチコア化が求められている．マルチコアシステムの設計においては，処理のコア配置を適切に決定する必要がある．そのためには，マルチコアシステムでは処理のコアへの配置や共有データのメモリ配置によりメモリアクセス時間やコア間の排他制御の実行オーバヘッドが変化するため，これらを考慮したリアルタイム性解析が必要となる．本研究では，シングルコア向けの最悪応答時間解析手法を拡張し，前述の実行オーバヘッドを考慮することにより，マルチコアに適した最悪応答時間解析手法を実現した．実現した手法を，パワトレアプリを想定した評価ソフトに適用した結果は，実機実行の結果と相関が高く，コア配置の決定に有用であることが分かった．","subitem_description_type":"Other"}]},"item_2_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"In recent years, vehicle systems have become more functionality. Among them, powertrain applications used for engine control are also required to be executed on multicore architectures. On multicore systems, it is necessary that each of processes is allocated to a core accordingly. Because the amount of execution overheads caused by memory access time and inter-core exclusive control depends on core and data allocation, considering those overheads is needed for analysis on multicore systems. In this study, we propose a worst case response time analysis method considering those overheads for multicore automotive systems. We applied our method to an evaluation software imitated power train application and executed this software on an actual processor board. As a result of comparison between them, our method can be used deciding core allocation because of strong relationship between them.","subitem_description_type":"Other"}]},"item_2_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"761","bibliographic_titles":[{"bibliographic_title":"情報処理学会論文誌"}],"bibliographicPageStart":"748","bibliographicIssueDates":{"bibliographicIssueDate":"2018-02-15","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"2","bibliographicVolumeNumber":"59"}]},"relation_version_is_last":true,"weko_creator_id":"11"},"created":"2025-01-19T00:52:57.197720+00:00","updated":"2025-01-20T02:49:20.254731+00:00"}