{"links":{},"id":185207,"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00185207","sets":["1164:2036:7856:9345"]},"path":["9345"],"owner":"11","recid":"185207","title":["Dependable Responsive Multithreaded Processor における低遅延リアルタイム実行"],"pubdate":{"attribute_name":"公開日","attribute_value":"2015-01-22"},"_buckets":{"deposit":"0f20f489-3513-4359-b06a-160861dd92ad"},"_deposit":{"id":"185207","pid":{"type":"depid","value":"185207","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"Dependable Responsive Multithreaded Processor における低遅延リアルタイム実行","author_link":["411346","411343","411350","411349","411348","411351","411345","411352","411344","411347","411353","411354"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"Dependable Responsive Multithreaded Processor における低遅延リアルタイム実行"},{"subitem_title":"A Low Latency Real-Time Execution on Dependable Responsive Multithreaded Processor","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"リアルタイム処理","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2015-01-22","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"慶應義塾大学大学院理工学研究科"},{"subitem_text_value":"慶應義塾大学大学院理工学研究科"},{"subitem_text_value":"慶應義塾大学大学院理工学研究科"},{"subitem_text_value":"慶應義塾大学大学院理工学研究科"},{"subitem_text_value":"慶應義塾大学理工学部"},{"subitem_text_value":"慶應義塾大学理工学部"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Science and Technology, Keio University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Science and Technology, Keio University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Science and Technology, Keio University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Science and Technology, Keio University","subitem_text_language":"en"},{"subitem_text_value":"Faculty of Science and Technology, Keio University","subitem_text_language":"en"},{"subitem_text_value":"Faculty of Science and Technology, Keio University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/185207/files/IPSJ-SLDM15169040.pdf","label":"IPSJ-SLDM15169040.pdf"},"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM15169040.pdf","filesize":[{"value":"1.1 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_login","version_id":"3d6b2326-a839-4ecb-836d-60173960c48d","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2015 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"溝谷, 圭悟"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"羽鳥, 雄介"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"久村, 雄輔"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"高須, 雅義"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"千代, 浩之"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"山崎, 信行"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Keigo, Mizotani","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Yusuke, Hatori","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Yusuke, Kumura","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Masayoshi, Takasu","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Hiroyuki, Chishiro","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Nobuyuki, Yamasaki","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8639","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"近年の組込みリアルタイムシステムにおいて，ハードリアルタイムタスクとソフトリアルタイムタスクの混在するシステムが多く存在する．ソフトリアルタイムタスクは優先度が低くスループットが重要視される一方で，ハードリアルタイムタスクは高い優先度を持ち短い周期で実行される．本研究では Dependable Responsive Multithreaded Processor を用いて，高優先度のハードリアルタイムタスクをリアルタイムスケジューラから分離してより短い周期で実行を行う低遅延リアルタイム実行機構を提案する．また，同時に低優先度のタスクはリアルタイムスケジューラによりスケジューリングを行うことで全体のスループットを保つ．実機評価では低遅延リアルタイム実行機構により 50μs の周期でタスクを実行し，低遅延リアルタイム実行機構によるオーバヘッドとジッタが充分に小さいことを示す．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"In recent embedded real-time systems, there are many systems with both hard real-time tasks and soft real-tune tasks. While a soft real-time task has a low priority and its throughput is important, a hard real-time task has a high priority and is executed in a short period. In this paper, we propose a low latency real-time execution mechanism which separates a hard real-time task with a high priority from the real-time scheduler and executes that task in a shorter period. We implement this mechanism by use of Dependable Responsive Multithreaded Processor. At the same time, low priority tasks are scheduled by the real-time scheduler, and hence the entire throughput is maintained. In our experimental evaluation, the low latency real-time execution mechanism executes a task in the period of 50 fis, and hence we show that its overhead and jitter are enough small.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システムとLSIの設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2015-01-22","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"40","bibliographicVolumeNumber":"2015-SLDM-169"}]},"relation_version_is_last":true,"weko_creator_id":"11"},"created":"2025-01-19T00:52:24.203052+00:00","updated":"2025-01-20T03:02:59.767232+00:00"}