{"updated":"2025-01-19T23:38:43.451276+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00018368","sets":["934:1119:1136:1138"]},"path":["1138"],"owner":"11","recid":"18368","title":["スーパーテクニカルサーバSR11000 モデルJ1 のノードアーキテクチャと性能評価"],"pubdate":{"attribute_name":"公開日","attribute_value":"2005-08-15"},"_buckets":{"deposit":"0bace158-16e1-4ffc-ad0a-3c2c6e9c944c"},"_deposit":{"id":"18368","pid":{"type":"depid","value":"18368","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"スーパーテクニカルサーバSR11000 モデルJ1 のノードアーキテクチャと性能評価","author_link":["457793","457799","457801","457797","457804","457802","457800","457794","457798","457803","457805","457796","457792","457795"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"スーパーテクニカルサーバSR11000 モデルJ1 のノードアーキテクチャと性能評価"},{"subitem_title":"Node Architecture and Performance Evaluation of the Hitachi Super Technical Server SR11000 Model J1","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"HPCハードウェア","subitem_subject_scheme":"Other"}]},"item_type_id":"3","publish_date":"2005-08-15","item_3_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"株式会社日立製作所中央研究所"},{"subitem_text_value":"株式会社日立製作所中央研究所"},{"subitem_text_value":"株式会社日立製作所中央研究所"},{"subitem_text_value":"株式会社日立製作所エンタープライズサーバ事業部"},{"subitem_text_value":"株式会社日立製作所エンタープライズサーバ事業部"},{"subitem_text_value":"株式会社日立製作所エンタープライズサーバ事業部"},{"subitem_text_value":"株式会社日立製作所ソフトウェア事業部"}]},"item_3_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Central Research Laboratory Hitachi, Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Central Research Laboratory Hitachi, Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Central Research Laboratory Hitachi, Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Enterprize Server Division Hitachi, Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Enterprize Server Division Hitachi, Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Enterprize Server Division Hitachi, Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Software Division Hitachi, Ltd.","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/18368/files/IPSJ-TACS4612004.pdf","label":"IPSJ-TACS4612004"},"date":[{"dateType":"Available","dateValue":"2007-08-15"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-TACS4612004.pdf","filesize":[{"value":"572.3 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"11"},{"tax":["include_tax"],"price":"0","billingrole":"14"},{"tax":["include_tax"],"price":"0","billingrole":"15"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"129da3e7-f5ce-42f1-8dae-27b3317c3d56","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2005 by the Information Processing Society of Japan"}]},"item_3_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"青木, 秀貴"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"中村, 友洋"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"助川, 直伸"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"齋藤, 拡二"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"深川, 正一"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"中川, 八穂子"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"五百木, 伸洋"}],"nameIdentifiers":[{}]}]},"item_3_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Hidetaka, Aoki","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Tomohiro, Nakamura","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Naonobu, Sukegawa","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Koji, Saito","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Masakazu, Fukagawa","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Yaoko, Nakagawa","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Nobuhiro, Ioki","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_3_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11833852","subitem_source_identifier_type":"NCID"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_6501","resourcetype":"journal article"}]},"item_3_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"1882-7829","subitem_source_identifier_type":"ISSN"}]},"item_3_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"科学技術計算をターゲットとするスーパーテクニカルサーバSR11000 モデルJ1 を開発した．POWER5 を16CPU 搭載するSR11000 モデルJ1 のノードは，理論ピーク演算性能121.6GFLOPSを有し，協調型マイクロプロセッサ（COMPAS）と呼ぶノード内並列処理方式と，擬似ベクトル処理（PVP）によるメモリアクセスを含めたパイプライン処理により，単一の高性能なプロセッシングエレメントとして利用できる．本稿では，COMPAS とPVP を可能とするSR11000 モデルJ1 のノードアーキテクチャを紹介するとともに，ノード性能の評価結果について述べる．","subitem_description_type":"Other"}]},"item_3_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"We developed the Hitachi Super Technical Server SR11000 model J1, which is suitable for scientific and technical computing.The node of SR11000 model J1, which is an SMP with 16 POWER5 CPUs with a theoretical peak performance of 121.6 GFLOPS, is designed for efficient execution of COMPAS (CO-operative Micro-Processors in single Address Space) parallel processing and PVP (Pseudo Vector Processing).This paper describes the node architecture of SR11000 model J1 and the results of performance evaluation.","subitem_description_type":"Other"}]},"item_3_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"36","bibliographic_titles":[{"bibliographic_title":"情報処理学会論文誌コンピューティングシステム（ACS）"}],"bibliographicPageStart":"27","bibliographicIssueDates":{"bibliographicIssueDate":"2005-08-15","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"SIG12(ACS11)","bibliographicVolumeNumber":"46"}]},"relation_version_is_last":true,"weko_creator_id":"11"},"created":"2025-01-18T22:51:07.321587+00:00","id":18368,"links":{}}