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Near Memory Processing on Hybrid Memories (Non-Refereed Workshop Manuscript)
https://ipsj.ixsq.nii.ac.jp/records/177043
https://ipsj.ixsq.nii.ac.jp/records/177043c0108e4f-0497-4edb-80ab-24fe678f6ff0
| 名前 / ファイル | ライセンス | アクション |
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Copyright (c) 2017 by the Information Processing Society of Japan
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| オープンアクセス | ||
| Item type | SIG Technical Reports(1) | |||||||
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| 公開日 | 2017-01-16 | |||||||
| タイトル | ||||||||
| タイトル | Near Memory Processing on Hybrid Memories (Non-Refereed Workshop Manuscript) | |||||||
| タイトル | ||||||||
| 言語 | en | |||||||
| タイトル | Near Memory Processing on Hybrid Memories (Non-Refereed Workshop Manuscript) | |||||||
| 言語 | ||||||||
| 言語 | eng | |||||||
| キーワード | ||||||||
| 主題Scheme | Other | |||||||
| 主題 | 三次元積層/メモリ | |||||||
| 資源タイプ | ||||||||
| 資源タイプ識別子 | http://purl.org/coar/resource_type/c_18gh | |||||||
| 資源タイプ | technical report | |||||||
| 著者所属 | ||||||||
| The University of Tokyo/Lawrence Livermore National Laboratory/RIKEN AICS | ||||||||
| 著者所属(英) | ||||||||
| en | ||||||||
| The University of Tokyo / Lawrence Livermore National Laboratory / RIKEN AICS | ||||||||
| 著者名 |
Eishi, Arima
× Eishi, Arima
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| 著者名(英) |
Eishi, Arima
× Eishi, Arima
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| 論文抄録 | ||||||||
| 内容記述タイプ | Other | |||||||
| 内容記述 | The data transfer between memories and processors is a major performance / power bottleneck for current computer systems. Particularly, the bottleneck is more severe while executing workloads who produce less regular and more frequent accesses to larger memory space. To overcome this problem, near memory processing that off-loads data processing tasks to the logic close to memories was proposed. However, that is not optimized accordingly for hybrid memory system, which is one of the best technique to sustain increasing demand for larger memory space with minimal performance impact. Therefore, this report explores near memory processing functionalities on hybrid main memories for several data intensive workloads. | |||||||
| 論文抄録(英) | ||||||||
| 内容記述タイプ | Other | |||||||
| 内容記述 | The data transfer between memories and processors is a major performance / power bottleneck for current computer systems. Particularly, the bottleneck is more severe while executing workloads who produce less regular and more frequent accesses to larger memory space. To overcome this problem, near memory processing that off-loads data processing tasks to the logic close to memories was proposed. However, that is not optimized accordingly for hybrid memory system, which is one of the best technique to sustain increasing demand for larger memory space with minimal performance impact. Therefore, this report explores near memory processing functionalities on hybrid main memories for several data intensive workloads. | |||||||
| 書誌レコードID | ||||||||
| 収録物識別子タイプ | NCID | |||||||
| 収録物識別子 | AA11451459 | |||||||
| 書誌情報 |
研究報告システムとLSIの設計技術(SLDM) 巻 2017-SLDM-178, 号 33, p. 1-4, 発行日 2017-01-16 |
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| ISSN | ||||||||
| 収録物識別子タイプ | ISSN | |||||||
| 収録物識別子 | 2188-8639 | |||||||
| Notice | ||||||||
| SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc. | ||||||||
| 出版者 | ||||||||
| 言語 | ja | |||||||
| 出版者 | 情報処理学会 | |||||||