{"created":"2025-01-19T00:44:27.827274+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00174242","sets":["581:8417:8426"]},"path":["8426"],"owner":"11","recid":"174242","title":["回路分割機能付きJava言語ベース高位合成ツールにおける回路検証機構"],"pubdate":{"attribute_name":"公開日","attribute_value":"2016-08-15"},"_buckets":{"deposit":"91813b96-f4fa-4b38-a0af-2717eff3cf2d"},"_deposit":{"id":"174242","pid":{"type":"depid","value":"174242","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"回路分割機能付きJava言語ベース高位合成ツールにおける回路検証機構","author_link":["356746","356748","356750","356747","356749","356753","356745","356751","356752","356744"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"回路分割機能付きJava言語ベース高位合成ツールにおける回路検証機構"},{"subitem_title":"Verification Mechanism for Partitioned Circuits on a Java-based High Level Synthesizer with a Circuit Partiotioning Function","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"[特集：組込みシステム工学] 高位合成，回路分割，回路検証","subitem_subject_scheme":"Other"}]},"item_type_id":"2","publish_date":"2016-08-15","item_2_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"東京農工大学"},{"subitem_text_value":"わさらぼ合同会社"},{"subitem_text_value":"東京農工大学／株式会社ビート・クラフト"},{"subitem_text_value":"株式会社イーツリーズ・ジャパン"},{"subitem_text_value":"東京農工大学"}]},"item_2_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Tokyo University of Agriculture and Technology","subitem_text_language":"en"},{"subitem_text_value":"BeatCraft, Inc.","subitem_text_language":"en"},{"subitem_text_value":"Tokyo University of Agriculture and Technology / BeatCraft, Inc.","subitem_text_language":"en"},{"subitem_text_value":"e-trees.Japan, Inc.","subitem_text_language":"en"},{"subitem_text_value":"Tokyo University of Agriculture and Technology","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/174242/files/IPSJ-JNL5708003.pdf","label":"IPSJ-JNL5708003.pdf"},"date":[{"dateType":"Available","dateValue":"2018-08-15"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-JNL5708003.pdf","filesize":[{"value":"2.1 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"8"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"8b0bc296-4794-4281-8a2e-3955c2a420c2","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2016 by the Information Processing Society of Japan"}]},"item_2_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"松田, 和也"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"三好, 健文"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"竹本, 正志"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"船田, 悟史"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"中條, 拓伯"}],"nameIdentifiers":[{}]}]},"item_2_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Kazuya, Matsuda","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Takefumi, Miyoshi","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Masashi, Takemoto","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Satoshi, Funada","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Hironori, Nakajo","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_2_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN00116647","subitem_source_identifier_type":"NCID"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_6501","resourcetype":"journal article"}]},"item_2_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"1882-7764","subitem_source_identifier_type":"ISSN"}]},"item_2_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"近年，従来の回路設計に用いられてきたHDLに替わり，高位合成ツールの活用に注目が集まっている．しかし，複雑なアルゴリズムをハードウェア化する際に，合成回路が大規模化する場合やシミュレーションに膨大な時間を要する場合がある．そこで，複数FPGAに対する分割実装が用いられるが，FPGAの回路規模やI/Oブロック数による制約が問題となり，検証環境の構築は容易ではない．本研究では，高位合成ツールの合成回路を部分回路に分割し，回路検証用のラッパーを生成することで，部分回路単位での検証を可能とする．高位合成ツールを用いて，FFTを実行するプログラムを合成し，回路分割検証機構により分割した．各部分回路は，シミュレーションおよびFPGA上で動作検証を行い，正常に動作することを確認した．","subitem_description_type":"Other"}]},"item_2_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"In recent years, a high-level synthesis tool has been attracted in designing hardware circuits instead of conventional HDL. However, there exist two issues to implement a complex algorithm into hardware, which brings growing scale of a synthesized circuit and long time for simulation. Therefore, though partitioning a circuit into multiple FPGAs is currently put into practical use, there are two constrains in implementation; the scale and the number of I/O blocks in an FPGA. Thus it is difficult to build a verification environment. In this study, we partition a circuit synthesized by a high-level synthesis tool into some reduced circuits. Moreover, the small circuits are equipped with self-verification function with generating a wrapper for each circuit verification. An FFT circuit which is generated by a high-level synthesis tool is partitioned by our proposed verification mechanism for partitioned circuits. We verify the partitioned circuits in RTL simulation as well as implementation on an FPGA in order to confirm our targeted circuits are correctly operated.","subitem_description_type":"Other"}]},"item_2_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"1689","bibliographic_titles":[{"bibliographic_title":"情報処理学会論文誌"}],"bibliographicPageStart":"1680","bibliographicIssueDates":{"bibliographicIssueDate":"2016-08-15","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"8","bibliographicVolumeNumber":"57"}]},"relation_version_is_last":true,"weko_creator_id":"11"},"id":174242,"updated":"2025-01-20T06:58:06.106992+00:00","links":{}}