{"created":"2025-01-18T22:50:05.390891+00:00","updated":"2025-01-22T23:35:34.539425+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00016963","sets":["934:935:982:983"]},"path":["983"],"owner":"1","recid":"16963","title":["逐次プログラムの投機並列実行を行う中間コードインタプリタの構成法"],"pubdate":{"attribute_name":"公開日","attribute_value":"1999-12-15"},"_buckets":{"deposit":"a31549c4-d459-41d2-96ef-decba50f51c3"},"_deposit":{"id":"16963","pid":{"type":"depid","value":"16963","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"逐次プログラムの投機並列実行を行う中間コードインタプリタの構成法","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"逐次プログラムの投機並列実行を行う中間コードインタプリタの構成法"},{"subitem_title":"Design of Automatic Parallelizing Intermediate Code Interpreter","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"通常論文","subitem_subject_scheme":"Other"}]},"item_type_id":"3","publish_date":"1999-12-15","item_3_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"電子技術総合研究所"},{"subitem_text_value":"電子技術総合研究所"},{"subitem_text_value":"電子技術総合研究所　筑波大学"}]},"item_3_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Electrotechnical Laboratory","subitem_text_language":"en"},{"subitem_text_value":"Electrotechnical Laboratory","subitem_text_language":"en"},{"subitem_text_value":"Electrotechnical Laboratory Tsukuba University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/16963/files/IPSJ-TPRO4010007.pdf"},"date":[{"dateType":"Available","dateValue":"2001-12-15"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-TPRO4010007.pdf","filesize":[{"value":"2.6 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"15"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"17e1c1df-39b6-4dd6-99dd-226a3498343e","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 1999 by the Information Processing Society of Japan"}]},"item_3_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"小池, 汎平"},{"creatorName":"山名, 早人"},{"creatorName":"山口, 喜教"}],"nameIdentifiers":[{}]}]},"item_3_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Hanpei, Koike","creatorNameLang":"en"},{"creatorName":"Hayato, Yamana","creatorNameLang":"en"},{"creatorName":"Yoshinori, Yamaguchi","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_3_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11464814","subitem_source_identifier_type":"NCID"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_6501","resourcetype":"journal article"}]},"item_3_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"1882-7802","subitem_source_identifier_type":"ISSN"}]},"item_3_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"本論文では 投機並列実行を行なうことにより逐次プログラムの自動的な並列実行を行う中間コードインタプリタを構成する方法についての検討を行う.次に 並列処理粒度を適切に制御するチェックポイント実行機能 探索／登録／排他制御のオーバヘッドを最小にして投機的メモリ操作を効率的に実現する手法など 効率的な投機並列実行を特別なハードウェアを用いずに実現するためのソフトウェア上の手法を提案する.そして これらの方法を用いることによってどの程度の基本性能が得られるかを評価するために行なった実験の結果を示す.実験結果から チェックポイント実行によって処理粒度を適切に設定すること および 投機的メモリ操作の効率的な実現をはじめとする様々なソフトウェア上の工夫をほどこすことにより 特別なハードウェアを用いなくても 並列処理による速度向上効果の得られる 投機並列実行中間コードインタプリタを抗せ宇する事が可能であることが確認された.","subitem_description_type":"Other"}]},"item_3_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"In this paper, the design of the intermediate code interpreter, which executes a sequential program in parallel using speculative method, is discussed. Software techniques which enable an efficient parallel speculative execution without hardware support, such as the check point execution mechanism with which an appropriate parallel execution granularity is established, and the efficient implementation of the speculative memory operations which minimize the overhead of searching, recording and the mutual exclusion, are proposed. Experiment results to see the basic performance of these techniques are also presented. From the experiment, we confirmed that we can implement a speculative intermediate code interpreter which can result in speedup, if we adopt the software techniques described in this paper.","subitem_description_type":"Other"}]},"item_3_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"74","bibliographic_titles":[{"bibliographic_title":"情報処理学会論文誌プログラミング（PRO）"}],"bibliographicPageStart":"64","bibliographicIssueDates":{"bibliographicIssueDate":"1999-12-15","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"SIG10(PRO5)","bibliographicVolumeNumber":"40"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"id":16963,"links":{}}